高性能0.1 μ m室温硅mosfet

1992 Symposium on VLSI Technology Digest of Technical Papers Pub Date : 1992-06-02 DOI:10.1109/VLSIT.1992.200661

R. Yan, K. Lee, D. Jeon, Y.O. Kim, B. Park, M. Pinto, C. Rafferty, D. Tennant, E. Westerwick, G. Chin, M. Morris, K. Early, P. Mulgrew, W. Mansfield, R. Watts, A.M. Voshchenkov, J. Bokor, R. Swartz, A. Ourmazd

{"title":"高性能0.1 μ m室温硅mosfet","authors":"R. Yan, K. Lee, D. Jeon, Y.O. Kim, B. Park, M. Pinto, C. Rafferty, D. Tennant, E. Westerwick, G. Chin, M. Morris, K. Early, P. Mulgrew, W. Mansfield, R. Watts, A.M. Voshchenkov, J. Bokor, R. Swartz, A. Ourmazd","doi":"10.1109/VLSIT.1992.200661","DOIUrl":null,"url":null,"abstract":"The design and implementation of 0.15- mu m-channel N-MOSFETs with very high current drive and good short channel behavior at room temperature are discussed. Measured subthreshold characteristics show a slope of 84 mV/dec and a shift for 75 mV for Delta V/sub ds/=1 V. A peak g/sub m/ of 570 mS/mm was recorded, leading to a unity-current-gain cutoff frequency (f/sub T/) of 89 GHz. Key process steps include the formation of 40-AA gate oxides and sub-500-AA junctions. Vertical doping engineering was used to minimize doping at the surface and beneath the junctions, while maintaining good turn-off characteristics.<<ETX>>","PeriodicalId":404756,"journal":{"name":"1992 Symposium on VLSI Technology Digest of Technical Papers","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"High performance 0.1- mu m room temperature Si MOSFETs\",\"authors\":\"R. Yan, K. Lee, D. Jeon, Y.O. Kim, B. Park, M. Pinto, C. Rafferty, D. Tennant, E. Westerwick, G. Chin, M. Morris, K. Early, P. Mulgrew, W. Mansfield, R. Watts, A.M. Voshchenkov, J. Bokor, R. Swartz, A. Ourmazd\",\"doi\":\"10.1109/VLSIT.1992.200661\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design and implementation of 0.15- mu m-channel N-MOSFETs with very high current drive and good short channel behavior at room temperature are discussed. Measured subthreshold characteristics show a slope of 84 mV/dec and a shift for 75 mV for Delta V/sub ds/=1 V. A peak g/sub m/ of 570 mS/mm was recorded, leading to a unity-current-gain cutoff frequency (f/sub T/) of 89 GHz. Key process steps include the formation of 40-AA gate oxides and sub-500-AA junctions. Vertical doping engineering was used to minimize doping at the surface and beneath the junctions, while maintaining good turn-off characteristics.<<ETX>>\",\"PeriodicalId\":404756,\"journal\":{\"name\":\"1992 Symposium on VLSI Technology Digest of Technical Papers\",\"volume\":\"61 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1992 Symposium on VLSI Technology Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1992.200661\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1992 Symposium on VLSI Technology Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1992.200661","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 19

摘要

讨论了室温下具有高电流驱动和良好短沟道性能的0.15 μ m沟道n - mosfet的设计与实现。测量的亚阈值特性显示，当δ V/sub /=1 V时，斜率为84 mV/dec，位移为75 mV。记录到峰值g/sub m/为570 mS/mm，导致单位电流增益截止频率(f/sub T/)为89 GHz。关键的工艺步骤包括形成40-AA栅极氧化物和低于500- aa的结。垂直掺杂工程用于减少表面和结下的掺杂，同时保持良好的关断特性

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

High performance 0.1- mu m room temperature Si MOSFETs

The design and implementation of 0.15- mu m-channel N-MOSFETs with very high current drive and good short channel behavior at room temperature are discussed. Measured subthreshold characteristics show a slope of 84 mV/dec and a shift for 75 mV for Delta V/sub ds/=1 V. A peak g/sub m/ of 570 mS/mm was recorded, leading to a unity-current-gain cutoff frequency (f/sub T/) of 89 GHz. Key process steps include the formation of 40-AA gate oxides and sub-500-AA junctions. Vertical doping engineering was used to minimize doping at the surface and beneath the junctions, while maintaining good turn-off characteristics.<>

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

1992 Symposium on VLSI Technology Digest of Technical Papers

自引率

0.00%

发文量

期刊最新文献

Repair technique for phase shifting masks using silicon-containing resist A Si bipolar transistor with f/sub max/ of 40 GHz and its application to a 35 GHz 1/16 dynamic frequency divider Trends in single-wafer processing Ultra-thin silicon dioxide leakage current and scaling limit Conductive channel in ONO formed by controlled dielectric breakdown