{"title":"基于电阻仿真的独立电压源逆变器故障通断","authors":"R. Mallik, D. Venkatramanan, A. Adapa, V. John","doi":"10.1109/ITEC-INDIA.2017.8333840","DOIUrl":null,"url":null,"abstract":"This paper presents a resistance emulation based fault ride through scheme for standalone voltage source inverters. Typically, fast electronic protection schemes such as overcurrent and IGBT desaturation, are employed to detect inverter overload and short-circuit faults. However, this results in complete inverter shut-down rapidly, much before the slower electromechanical protection systems such as circuit breakers can function. In this work, a resistance emulation based technique is suggested that provides fault ride-through capability to the inverter, thus allowing electromechanical protections to function. A state machine is presented which incorporates hierarchal loop stability and multiple current constraints for appropriate impedance selection. The proposed method is verified in hardware.","PeriodicalId":312418,"journal":{"name":"2017 IEEE Transportation Electrification Conference (ITEC-India)","volume":"152 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Resistance emulation based fault ride-through in standalone voltage source inverters\",\"authors\":\"R. Mallik, D. Venkatramanan, A. Adapa, V. John\",\"doi\":\"10.1109/ITEC-INDIA.2017.8333840\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a resistance emulation based fault ride through scheme for standalone voltage source inverters. Typically, fast electronic protection schemes such as overcurrent and IGBT desaturation, are employed to detect inverter overload and short-circuit faults. However, this results in complete inverter shut-down rapidly, much before the slower electromechanical protection systems such as circuit breakers can function. In this work, a resistance emulation based technique is suggested that provides fault ride-through capability to the inverter, thus allowing electromechanical protections to function. A state machine is presented which incorporates hierarchal loop stability and multiple current constraints for appropriate impedance selection. The proposed method is verified in hardware.\",\"PeriodicalId\":312418,\"journal\":{\"name\":\"2017 IEEE Transportation Electrification Conference (ITEC-India)\",\"volume\":\"152 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Transportation Electrification Conference (ITEC-India)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ITEC-INDIA.2017.8333840\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Transportation Electrification Conference (ITEC-India)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITEC-INDIA.2017.8333840","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Resistance emulation based fault ride-through in standalone voltage source inverters
This paper presents a resistance emulation based fault ride through scheme for standalone voltage source inverters. Typically, fast electronic protection schemes such as overcurrent and IGBT desaturation, are employed to detect inverter overload and short-circuit faults. However, this results in complete inverter shut-down rapidly, much before the slower electromechanical protection systems such as circuit breakers can function. In this work, a resistance emulation based technique is suggested that provides fault ride-through capability to the inverter, thus allowing electromechanical protections to function. A state machine is presented which incorporates hierarchal loop stability and multiple current constraints for appropriate impedance selection. The proposed method is verified in hardware.