{"title":"定位嵌入式内存故障的LADA方法","authors":"B. Yeoh, M.H. Thor, L.S. Gan, Y. Chan, S. Goh","doi":"10.1109/IPFA55383.2022.9915715","DOIUrl":null,"url":null,"abstract":"Dynamic Laser Stimulation (DLS) techniques have met with great success to debug integrated circuit (IC) soft failure. Laser assisted device alteration (LADA) is one of the DLS technique well-established to tackle speed-path failure and analysis of defect-free performance limiting circuits. In this work, we discuss atypical LADA analysis to localize system-on-chip (SOC) memory manufacturing soft and hard defects.","PeriodicalId":378702,"journal":{"name":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"LADA methodologies to localize embedded memory failure\",\"authors\":\"B. Yeoh, M.H. Thor, L.S. Gan, Y. Chan, S. Goh\",\"doi\":\"10.1109/IPFA55383.2022.9915715\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Dynamic Laser Stimulation (DLS) techniques have met with great success to debug integrated circuit (IC) soft failure. Laser assisted device alteration (LADA) is one of the DLS technique well-established to tackle speed-path failure and analysis of defect-free performance limiting circuits. In this work, we discuss atypical LADA analysis to localize system-on-chip (SOC) memory manufacturing soft and hard defects.\",\"PeriodicalId\":378702,\"journal\":{\"name\":\"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"102 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA55383.2022.9915715\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA55383.2022.9915715","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
LADA methodologies to localize embedded memory failure
Dynamic Laser Stimulation (DLS) techniques have met with great success to debug integrated circuit (IC) soft failure. Laser assisted device alteration (LADA) is one of the DLS technique well-established to tackle speed-path failure and analysis of defect-free performance limiting circuits. In this work, we discuss atypical LADA analysis to localize system-on-chip (SOC) memory manufacturing soft and hard defects.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
