{"title":"利用设计模块化和重新定位来提高基于fpga的计算系统的生产率","authors":"Zbigniew Mudza","doi":"10.23919/MIXDES52406.2021.9497564","DOIUrl":null,"url":null,"abstract":"Long development cycles are a crucial disadvantage of FPGA-based systems. Reusing implementation results of a module for multiple instances and across different designs can mitigate this issue. Identical relative placement and routing for multiple instances of a module can be forced in Xilinx 7 Series devices with strict design constraining. A reference instance of a module can be implemented in a certain section of FPGA fabric. Fixed placement and routing constraints can be extracted from the obtained results and relocated to any identical section of FPGA fabric. The approach is especially useful when applied to reconfigurable partitions – it supports independent development and implementation of reconfigurable modules and static design. Also, in some cases it can be extended to relocating entire partial bitstreams.","PeriodicalId":375541,"journal":{"name":"2021 28th International Conference on Mixed Design of Integrated Circuits and System","volume":"383 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Exploiting Design Modularity and Relocation to Increase Productivity in FPGA-based Computing Systems\",\"authors\":\"Zbigniew Mudza\",\"doi\":\"10.23919/MIXDES52406.2021.9497564\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Long development cycles are a crucial disadvantage of FPGA-based systems. Reusing implementation results of a module for multiple instances and across different designs can mitigate this issue. Identical relative placement and routing for multiple instances of a module can be forced in Xilinx 7 Series devices with strict design constraining. A reference instance of a module can be implemented in a certain section of FPGA fabric. Fixed placement and routing constraints can be extracted from the obtained results and relocated to any identical section of FPGA fabric. The approach is especially useful when applied to reconfigurable partitions – it supports independent development and implementation of reconfigurable modules and static design. Also, in some cases it can be extended to relocating entire partial bitstreams.\",\"PeriodicalId\":375541,\"journal\":{\"name\":\"2021 28th International Conference on Mixed Design of Integrated Circuits and System\",\"volume\":\"383 1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 28th International Conference on Mixed Design of Integrated Circuits and System\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/MIXDES52406.2021.9497564\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 28th International Conference on Mixed Design of Integrated Circuits and System","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/MIXDES52406.2021.9497564","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Exploiting Design Modularity and Relocation to Increase Productivity in FPGA-based Computing Systems
Long development cycles are a crucial disadvantage of FPGA-based systems. Reusing implementation results of a module for multiple instances and across different designs can mitigate this issue. Identical relative placement and routing for multiple instances of a module can be forced in Xilinx 7 Series devices with strict design constraining. A reference instance of a module can be implemented in a certain section of FPGA fabric. Fixed placement and routing constraints can be extracted from the obtained results and relocated to any identical section of FPGA fabric. The approach is especially useful when applied to reconfigurable partitions – it supports independent development and implementation of reconfigurable modules and static design. Also, in some cases it can be extended to relocating entire partial bitstreams.