Optimal algorithm for profile-based power gating: A compiler technique for reducing leakage on execution units in microprocessors

This paper proposes a compiler-based solution to the problem of inserting power gating instructions into code to control activation/deactivation (i.e., ON/OFF) of functional units in microprocessor during the code execution, so that the leakage power is maximally saved. Precisely, based on an execution profile of code containing conditional braches and/or loops, we propose a polynomial time optimal algorithm, called PG-instr, of inserting ON/OFF instructions into code with the objective of minimzing the expected total leakage power while considerig the power and delay overhead on power gating.