A. Umezawa, S. Atsumi, M. Kuriyama, H. Banba, C. Hoshino, K. Naruke, S. Yamada, Y. Ohshima, M. Oshikiri, Y. Hiura, T. Suzuki, K. Yoshikawa
{"title":"一种新的扇区可擦除16mb闪存EEPROM的自数据刷新方案","authors":"A. Umezawa, S. Atsumi, M. Kuriyama, H. Banba, C. Hoshino, K. Naruke, S. Yamada, Y. Ohshima, M. Oshikiri, Y. Hiura, T. Suzuki, K. Yoshikawa","doi":"10.1109/VLSIC.1993.920560","DOIUrl":null,"url":null,"abstract":"A newly developed refresh scheme is introduced in a 16-Mb flash EEPROM. By providing each refresh block with its own nonvolatile element, excessive voltage stress of the flag element can be eliminated during the erase/program cycling. A small sector erase can be realized in the 16-Mb flash memory with this scheme. The EEPROM is realised in a 0.6 /spl mu/m single-metal triple-well CMOS process technology.","PeriodicalId":127467,"journal":{"name":"Symposium 1993 on VLSI Circuits","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A new self-data-refresh scheme for a sector erasable 16-Mb flash EEPROM\",\"authors\":\"A. Umezawa, S. Atsumi, M. Kuriyama, H. Banba, C. Hoshino, K. Naruke, S. Yamada, Y. Ohshima, M. Oshikiri, Y. Hiura, T. Suzuki, K. Yoshikawa\",\"doi\":\"10.1109/VLSIC.1993.920560\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A newly developed refresh scheme is introduced in a 16-Mb flash EEPROM. By providing each refresh block with its own nonvolatile element, excessive voltage stress of the flag element can be eliminated during the erase/program cycling. A small sector erase can be realized in the 16-Mb flash memory with this scheme. The EEPROM is realised in a 0.6 /spl mu/m single-metal triple-well CMOS process technology.\",\"PeriodicalId\":127467,\"journal\":{\"name\":\"Symposium 1993 on VLSI Circuits\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-05-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Symposium 1993 on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1993.920560\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1993 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1993.920560","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new self-data-refresh scheme for a sector erasable 16-Mb flash EEPROM
A newly developed refresh scheme is introduced in a 16-Mb flash EEPROM. By providing each refresh block with its own nonvolatile element, excessive voltage stress of the flag element can be eliminated during the erase/program cycling. A small sector erase can be realized in the 16-Mb flash memory with this scheme. The EEPROM is realised in a 0.6 /spl mu/m single-metal triple-well CMOS process technology.