{"title":"VCCS控制LDO的小片上电容","authors":"Qiuli Li, Yao Qian, Danzhu Lu, Zhiliang Hong","doi":"10.1109/ASICON.2013.6811903","DOIUrl":null,"url":null,"abstract":"A stable LDO (Low Drop-Out linear regulator) using VCCS (Voltage Control Current Source) is presented. The LDO is designed and implemented on GF 2P4M 0.35 μm CMOS technology. Compared with previous compensation scheme, VCCS can implement a real stable LDO with a small on-chip capacitor of 1 pF, whose stability is not affected by the variable ESR (Equivalent Series Resistor). The united gain frequency can achieve 1.5 MHz, improving the transient response. Test result shows that the LDO is stable over the full load current, with a maximum output current of 100 mA.","PeriodicalId":150654,"journal":{"name":"2013 IEEE 10th International Conference on ASIC","volume":"110 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"VCCS controlled LDO with small on-chip capacitor\",\"authors\":\"Qiuli Li, Yao Qian, Danzhu Lu, Zhiliang Hong\",\"doi\":\"10.1109/ASICON.2013.6811903\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A stable LDO (Low Drop-Out linear regulator) using VCCS (Voltage Control Current Source) is presented. The LDO is designed and implemented on GF 2P4M 0.35 μm CMOS technology. Compared with previous compensation scheme, VCCS can implement a real stable LDO with a small on-chip capacitor of 1 pF, whose stability is not affected by the variable ESR (Equivalent Series Resistor). The united gain frequency can achieve 1.5 MHz, improving the transient response. Test result shows that the LDO is stable over the full load current, with a maximum output current of 100 mA.\",\"PeriodicalId\":150654,\"journal\":{\"name\":\"2013 IEEE 10th International Conference on ASIC\",\"volume\":\"110 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 10th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON.2013.6811903\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 10th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2013.6811903","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A stable LDO (Low Drop-Out linear regulator) using VCCS (Voltage Control Current Source) is presented. The LDO is designed and implemented on GF 2P4M 0.35 μm CMOS technology. Compared with previous compensation scheme, VCCS can implement a real stable LDO with a small on-chip capacitor of 1 pF, whose stability is not affected by the variable ESR (Equivalent Series Resistor). The united gain frequency can achieve 1.5 MHz, improving the transient response. Test result shows that the LDO is stable over the full load current, with a maximum output current of 100 mA.
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