具有高检测分辨率的高密度宽量程数字加速度计阵列

Y. Tang, K. Najafi
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引用次数: 2

摘要

本文介绍了一种新型数字加速度计阵列的实现和初步表征,该阵列具有高宽高比(HAR)硅证明质量,密集的传感器阵列,精确定义的气隙和小空气阻尼,具有高检测分辨率和低噪声。我们制作并测试了16元(4位)和32元(5位)阈值加速度计阵列(芯片面积2.33毫克/mm2),从而增加了阵列密度和减少了芯片面积,同时实现了<1μg的布朗噪声等效加速度(BNEA)。
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High-density wide-range digital accelerometer arrays with high detection resolution
This paper presents the implementation and preliminary characterization of a new type of digital accelerometer array with high detection resolution and low noise, enabled by high aspect-ratio (HAR) silicon proof-mass, dense sensor array, precisely-defined air-gaps and small air damping. We fabricated and tested 16-element (4-bit) and 32-element (5-bit) threshold accelerometer arrays (chip area <1 cm2) with evenly-spaced threshold air-gaps from 1–4 μm and incremental air-gaps as small as 100 nm. Vertically anchored springs of different cross-sectional dimensions (102–30μm2) are further designed to target specific g-ranges from < 100 mg to 40 g. The digital accelerometer chips are fabricated using a modified silicon-on-glass (SOG) process which provides tall (1mm) and HAR proof-mass within small footprint (>2.33 milligram/mm2), thus increasing the array density and reducing chip area while achieving Brownian noise equivalent acceleration (BNEA) at <1μg.
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