{"title":"高速单电子存储器的仿真","authors":"H. Mizuta, K. Katayama, H. Muller, D. Williams","doi":"10.1109/IWCE.1998.742696","DOIUrl":null,"url":null,"abstract":"A novel lateral single electron memory (L-SEM) architecture and its high-speed write operation were demonstrated with a write time comparable to conventional DRAMs. Excellent subthreshold characteristics of the sense MOSFET with split gates were also presented. The robustness of the L-SEM cell structure was also discussed in terms of the offset charge issue.","PeriodicalId":357304,"journal":{"name":"1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Simulation of high-speed single-electron memory\",\"authors\":\"H. Mizuta, K. Katayama, H. Muller, D. Williams\",\"doi\":\"10.1109/IWCE.1998.742696\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel lateral single electron memory (L-SEM) architecture and its high-speed write operation were demonstrated with a write time comparable to conventional DRAMs. Excellent subthreshold characteristics of the sense MOSFET with split gates were also presented. The robustness of the L-SEM cell structure was also discussed in terms of the offset charge issue.\",\"PeriodicalId\":357304,\"journal\":{\"name\":\"1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116)\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-10-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWCE.1998.742696\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWCE.1998.742696","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel lateral single electron memory (L-SEM) architecture and its high-speed write operation were demonstrated with a write time comparable to conventional DRAMs. Excellent subthreshold characteristics of the sense MOSFET with split gates were also presented. The robustness of the L-SEM cell structure was also discussed in terms of the offset charge issue.