Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro

This paper presents different design assist techniques and demonstrates their impact on enhancing the intrinsic RRAM performance. We show that the read-beforewrite, current-limitation and write-termination techniques reduce by -47%, -56% and-13% the power consumption during the writing process, respectively. Combined with write verification and error correction code, the overall improvements are 87% in energy saving and -55% on access time. Based on representative RRAM macro (130nm CMOS), statistic (128kb) and endurance (1M cycles) characterizations, this works contributes to accelerate RRAM industrial adoption by highlighting the design-technology co-optimization contribution.