{"title":"低比导通电阻p型OPTVLDLDMOS双孔导电路径SPIC应用","authors":"Junji Cheng, Xingbi Chen","doi":"10.1109/ISPSD.2012.6229064","DOIUrl":null,"url":null,"abstract":"A novel p-type DP-OPTVLD (Double-Paths & OPTimum-Variational-Lateral-Doping) LDMOS is proposed. It features the double hole-conductive paths formed by a top and a buried p-layer in the drift region using OPTVLD technique, which significantly contribute to reducing device specific on-resistance. The design principle and electrical characteristics of the proposed structure are investigated theoretically and experimentally. Simulation results show that the specific on-resistances are 155/689 mΩ·cm2 with breakdown voltages of 300/800 V for the proposed structure, respectively, which are less than 60% of that with corresponding breakdown voltages for the conventional structure. This structure used as high-side can apply to SPIC with a low integration difficulty and a low fabrication cost.","PeriodicalId":371298,"journal":{"name":"2012 24th International Symposium on Power Semiconductor Devices and ICs","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Low specific on-resistance p-type OPTVLDLDMOS with double hole-conductive paths for SPIC application\",\"authors\":\"Junji Cheng, Xingbi Chen\",\"doi\":\"10.1109/ISPSD.2012.6229064\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel p-type DP-OPTVLD (Double-Paths & OPTimum-Variational-Lateral-Doping) LDMOS is proposed. It features the double hole-conductive paths formed by a top and a buried p-layer in the drift region using OPTVLD technique, which significantly contribute to reducing device specific on-resistance. The design principle and electrical characteristics of the proposed structure are investigated theoretically and experimentally. Simulation results show that the specific on-resistances are 155/689 mΩ·cm2 with breakdown voltages of 300/800 V for the proposed structure, respectively, which are less than 60% of that with corresponding breakdown voltages for the conventional structure. This structure used as high-side can apply to SPIC with a low integration difficulty and a low fabrication cost.\",\"PeriodicalId\":371298,\"journal\":{\"name\":\"2012 24th International Symposium on Power Semiconductor Devices and ICs\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 24th International Symposium on Power Semiconductor Devices and ICs\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2012.6229064\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 24th International Symposium on Power Semiconductor Devices and ICs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2012.6229064","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low specific on-resistance p-type OPTVLDLDMOS with double hole-conductive paths for SPIC application
A novel p-type DP-OPTVLD (Double-Paths & OPTimum-Variational-Lateral-Doping) LDMOS is proposed. It features the double hole-conductive paths formed by a top and a buried p-layer in the drift region using OPTVLD technique, which significantly contribute to reducing device specific on-resistance. The design principle and electrical characteristics of the proposed structure are investigated theoretically and experimentally. Simulation results show that the specific on-resistances are 155/689 mΩ·cm2 with breakdown voltages of 300/800 V for the proposed structure, respectively, which are less than 60% of that with corresponding breakdown voltages for the conventional structure. This structure used as high-side can apply to SPIC with a low integration difficulty and a low fabrication cost.
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