{"title":"在1.5 Gbps下消耗7mW的LVDS接收器","authors":"Sultan A. Alqarni, A. Kamal","doi":"10.1109/ICM.2014.7071842","DOIUrl":null,"url":null,"abstract":"This paper presents an LVDS receiver compatible with ANSI and IEEE standards at 1.5 Gbps. The proposed receiver aims to be compatible with the standard over PVT corners and to have optimized power consumption using 150nm technology with two voltage supplies 3.3 and 1.8V. The receiver design methodology is explained and where is the critical specifications of the standard to be met for other different designs. The presented design consumes 7mW at 1.5Gbps.","PeriodicalId":107354,"journal":{"name":"2014 26th International Conference on Microelectronics (ICM)","volume":"197 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"LVDS receiver with 7mW consumption at 1.5 Gbps\",\"authors\":\"Sultan A. Alqarni, A. Kamal\",\"doi\":\"10.1109/ICM.2014.7071842\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an LVDS receiver compatible with ANSI and IEEE standards at 1.5 Gbps. The proposed receiver aims to be compatible with the standard over PVT corners and to have optimized power consumption using 150nm technology with two voltage supplies 3.3 and 1.8V. The receiver design methodology is explained and where is the critical specifications of the standard to be met for other different designs. The presented design consumes 7mW at 1.5Gbps.\",\"PeriodicalId\":107354,\"journal\":{\"name\":\"2014 26th International Conference on Microelectronics (ICM)\",\"volume\":\"197 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 26th International Conference on Microelectronics (ICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2014.7071842\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 26th International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2014.7071842","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents an LVDS receiver compatible with ANSI and IEEE standards at 1.5 Gbps. The proposed receiver aims to be compatible with the standard over PVT corners and to have optimized power consumption using 150nm technology with two voltage supplies 3.3 and 1.8V. The receiver design methodology is explained and where is the critical specifications of the standard to be met for other different designs. The presented design consumes 7mW at 1.5Gbps.
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