模拟与混合信号(AMS)电路的缺陷仿真框架

M. Saikiran, Mona Ganji, Degang Chen
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引用次数: 4

摘要

由于电路复杂性的增加,特别是在需要满足非常高的缺陷覆盖率(通常>90%)的安全关键汽车应用中,AMS电路中的缺陷模拟时间正在迅速增长。缺陷模拟时间的减少直接转化为总体开发时间的减少。在这项工作中,我们提出了一个时间高效的框架来模拟AMS电路在预硅测试期间的各种缺陷。该方法利用Verilog-A模块实现给定的缺陷模型,并根据缺陷检测方案,在给定的测试条件下,通过一次测试运行测试电路中几乎所有的缺陷。为了强有力地验证我们的框架,我们对运算放大器使用了两种不同的缺陷检测方案。第一种检测方案是有意偏移注入(IOI)方法,它主要是一种直流测试方案。对于该方案,与传统框架相比,所提出的框架节省了10倍以上的时间。第二种方案是振荡测试法(OTM),这是一种瞬态测试方案。对于该OTM方案,我们表明所提出的框架可以将仿真时间减少到传统仿真时间的50%以下。我们还展示了所建议的框架对缺陷覆盖没有负面影响。
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A Time-Efficient Defect Simulation Framework for Analog and Mixed Signal (AMS) Circuits
Defect simulation time in AMS circuits is rapidly growing due to increasing circuit complexity, especially in safety-critical automotive applications which needs to meet very high defect coverage (usually >90%). Reduction in defect simulation time directly translates into reduction in overall development time. In this work, we propose a time-efficient framework to simulate various defects during pre-silicon testing of AMS circuits. The proposed method uses Verilog-A modules to realize a given defect model and tests nearly all the defects in a circuit with a single test run (for a given test condition) depending on the defect-detection scheme. To strongly validate our framework, we use two distinct defect detection schemes for operational amplifiers. The first detection scheme is the intentional offset injection (IOI) method which, predominantly, is a DC testing scheme. For this scheme, the proposed framework achieved a time-saving factor of more than 10X compared to the conventional framework. The second scheme is the oscillation test method (OTM) which is a transient testing scheme. For this OTM scheme, we show that the proposed framework can reduce the simulation time to less than 50% of the conventional simulation time. We also show that the proposed framework has no negative impact on defect coverage.
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