{"title":"基于risc的MIPS64模拟器中最长公共子序列算法的仿真","authors":"Glenn Paul P. Gara, M. P. B. Pacot, R. Uy","doi":"10.1109/TENCON.2018.8650369","DOIUrl":null,"url":null,"abstract":"The longest common subsequence (LCS) is an essential technique in the sequence alignment. By deleting zero or more symbols, it determines one of the longest subsequences in a sequence. This paper described a simulation of the algorithm using the EduMIPS64 and MIPSers simulators where the latter implements the most recent developments of MIPS64 instruction sets. The method applied to solve the LCS in this study was the first known solution invented by Wagner and Fischer. The authors programmed the LCS on a RISC architecture and evaluated the results of the test cases by observing the number of clock cycles performed through the simulators. Results show that the MIPSers executed the least number of clock cycles compared to the EduMIPS64 simulator.","PeriodicalId":132900,"journal":{"name":"TENCON 2018 - 2018 IEEE Region 10 Conference","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"RISC-Based Simulation of Longest Common Subsequence Algorithm in MIPS64 Simulators\",\"authors\":\"Glenn Paul P. Gara, M. P. B. Pacot, R. Uy\",\"doi\":\"10.1109/TENCON.2018.8650369\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The longest common subsequence (LCS) is an essential technique in the sequence alignment. By deleting zero or more symbols, it determines one of the longest subsequences in a sequence. This paper described a simulation of the algorithm using the EduMIPS64 and MIPSers simulators where the latter implements the most recent developments of MIPS64 instruction sets. The method applied to solve the LCS in this study was the first known solution invented by Wagner and Fischer. The authors programmed the LCS on a RISC architecture and evaluated the results of the test cases by observing the number of clock cycles performed through the simulators. Results show that the MIPSers executed the least number of clock cycles compared to the EduMIPS64 simulator.\",\"PeriodicalId\":132900,\"journal\":{\"name\":\"TENCON 2018 - 2018 IEEE Region 10 Conference\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"TENCON 2018 - 2018 IEEE Region 10 Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TENCON.2018.8650369\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"TENCON 2018 - 2018 IEEE Region 10 Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TENCON.2018.8650369","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
RISC-Based Simulation of Longest Common Subsequence Algorithm in MIPS64 Simulators
The longest common subsequence (LCS) is an essential technique in the sequence alignment. By deleting zero or more symbols, it determines one of the longest subsequences in a sequence. This paper described a simulation of the algorithm using the EduMIPS64 and MIPSers simulators where the latter implements the most recent developments of MIPS64 instruction sets. The method applied to solve the LCS in this study was the first known solution invented by Wagner and Fischer. The authors programmed the LCS on a RISC architecture and evaluated the results of the test cases by observing the number of clock cycles performed through the simulators. Results show that the MIPSers executed the least number of clock cycles compared to the EduMIPS64 simulator.