Optimizing Savitzky-Golay Filter on GPU and FPGA Accelerators for Financial Applications

Over the last few years, computational power and intelligence are becoming more and more necessary in the sector of finance. More specifically, computational finance turns into a very popular topic for both academia and industry, where numerous published works from this field and especially investment and risk management, showcase the effects of these technological advancements. At the same time, the ever-increased computational demands have led to the deployment of various accelerators in order to meet both latency and power constraints for financial applications that vary from special purpose, made by economists, to general purpose Digital Signal Processing (DSP) applied in financial time-series. One of the most widely used applications, belonging to the 2nd category, is the Savitzky-Golay algorithm, a filter used for smoothing time-series data. In this work, we propose a mechanism that automatically creates different accelerated Savitzky-Golay filters for GPUs and FPGAs, based on a set of pre-accelerated templates. By evaluating the provided templates with a set of real use-case parameters, a speedup of x33.5 on the NVIDIA T4 GPU and x21.9 on the Alveo U50 FPGA is achieved compared with an Intel Xeon Gold 5218R CPU as a baseline, while achieving a decrease in power consumption of 89% and 70% respectively, disclosing a real latency-power trade-of between both accelerators.