时钟场耦合电路的同步

2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO) Pub Date : 2018-07-01 DOI:10.1109/NANO.2018.8626294

F. S. Torres, Marcel Walter, R. Wille, Daniel Große, R. Drechsler

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引用次数: 14

摘要

在时钟场耦合纳米计算(FCN)电路中，适当的同步是一个基本问题。在这项工作中，我们首次表明全局同步性不是时钟FCN设计的强制性要求，并讨论了全局同步性对顺序和大规模设计的相当大的限制。此外，我们提出了一种解决方案，绕过了由于同步要求而造成的设计限制，并提出了一种新的rs锁存器。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Synchronization of Clocked Field-Coupled Circuits

Proper synchronization in clocked Field-Coupled Nanocomputing (FCN) circuits is a fundamental problem. In this work, we show for the first time that global synchronicity is not a mandatory requirement in clocked FCN designs and discuss the considerable restrictions that global synchronicity presents for sequential and large-scale designs. Furthermore, we propose a solution that circumvents design restrictions due to synchronization requirements and present a novel RS-latch.

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2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO)

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