An Energy Dissipation and Cost Optimization of QCA Ripple Carry Adder

In comparison to CMOS technique, quantum-dot cellular automata (QCA) is a cutting-edge computation approach that recommends reduced dimension and fast speed. Furthermore, the Full Adder is a fundamental unit in many important circuits such as ALUs, Processors, and so on. An efficient QCA 1-bit Full Adder (FA) topology is planned in this article, and we offer an energy and cost competent 4-bit Ripple Carry Adder architecture employing this suggested optimal full adder topology. The projected QCA layout is modest in architecture and strong in standings of executing digital circuits. Energy and cost proficient design of the suggested adder can lead to the efficient design of any digital system architecture. We planned an energy and cost efficient 4-bit RCA by employing the projected efficient full adder. In order to construct 4-bit QCA RCA, the triplet design technique was used. Those structures are simple in design and take up a little portion of the land, similar to prior designs. The projected efficient 1-bit Full adder topology consists only 11 and 16 QCA cells and having 0.013 μm2 and 0.011μm2 area. A 4-bit RCA topology contains 53 and 49 QCA cells and triplet approach 4-bit RCA design of containing 59 QCA cells, which is the smallest among all past designs. The simulation results demonstrate that the suggested digital design and architecture have achieved significant improvements in circuit complexity positions. The proposed architecture of 4 bit RCA involves just around 39% less area as equated with the previously existing designs. The functionality of projected structures estimated in the QCADesigner simulation environment.