Jiann-Jong Chen, Bo-Han Hwang, Che-Min Kung, Weiyu Tai, Yuh-Shyan Hwang
{"title":"采用平均电流模式控制的新型单电感二次降压变换器","authors":"Jiann-Jong Chen, Bo-Han Hwang, Che-Min Kung, Weiyu Tai, Yuh-Shyan Hwang","doi":"10.1109/ICIEA.2010.5515818","DOIUrl":null,"url":null,"abstract":"A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation is proposed in this paper. The average-current-mode technology minimizes several power-management problems, such as efficiency, EMI, size, transient response, design complexity, and cost. In DC/DC conversion applications that require a wide range of input and/or output voltages, conventional PWM buck converter topologies always operate at exceptionally low duty ratios, which limit the operation to the lower switching frequencies due to minimum ON-time of the transistor switch. The DC voltage conversion ratio of the proposed converter has a quadratic dependence on duty cycle, producing an extensive step-down; therefore, the high conversion ratio is achieved. This scheme employs an inner loop for current gain and an outer loop for PID-controller. The proposed buck converter only uses an inductor, two capacitors and single control circuit to achieve quadratic conversion ratio, therefore, an inductor and a control circuit is reduced. The advantages of the proposed quadratic buck converter are fast transient response, no use for slope-compensation, high-conversion-ratio, and an inductor reduction. The prototype of the proposed quadratic buck converter has been fabricated with TSMC 0.35µm 2P4M CMOS processes. The total chip area is 1.917 × 2.334 mm2.","PeriodicalId":234296,"journal":{"name":"2010 5th IEEE Conference on Industrial Electronics and Applications","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation\",\"authors\":\"Jiann-Jong Chen, Bo-Han Hwang, Che-Min Kung, Weiyu Tai, Yuh-Shyan Hwang\",\"doi\":\"10.1109/ICIEA.2010.5515818\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation is proposed in this paper. The average-current-mode technology minimizes several power-management problems, such as efficiency, EMI, size, transient response, design complexity, and cost. In DC/DC conversion applications that require a wide range of input and/or output voltages, conventional PWM buck converter topologies always operate at exceptionally low duty ratios, which limit the operation to the lower switching frequencies due to minimum ON-time of the transistor switch. The DC voltage conversion ratio of the proposed converter has a quadratic dependence on duty cycle, producing an extensive step-down; therefore, the high conversion ratio is achieved. This scheme employs an inner loop for current gain and an outer loop for PID-controller. The proposed buck converter only uses an inductor, two capacitors and single control circuit to achieve quadratic conversion ratio, therefore, an inductor and a control circuit is reduced. The advantages of the proposed quadratic buck converter are fast transient response, no use for slope-compensation, high-conversion-ratio, and an inductor reduction. The prototype of the proposed quadratic buck converter has been fabricated with TSMC 0.35µm 2P4M CMOS processes. The total chip area is 1.917 × 2.334 mm2.\",\"PeriodicalId\":234296,\"journal\":{\"name\":\"2010 5th IEEE Conference on Industrial Electronics and Applications\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 5th IEEE Conference on Industrial Electronics and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIEA.2010.5515818\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 5th IEEE Conference on Industrial Electronics and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIEA.2010.5515818","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation
A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation is proposed in this paper. The average-current-mode technology minimizes several power-management problems, such as efficiency, EMI, size, transient response, design complexity, and cost. In DC/DC conversion applications that require a wide range of input and/or output voltages, conventional PWM buck converter topologies always operate at exceptionally low duty ratios, which limit the operation to the lower switching frequencies due to minimum ON-time of the transistor switch. The DC voltage conversion ratio of the proposed converter has a quadratic dependence on duty cycle, producing an extensive step-down; therefore, the high conversion ratio is achieved. This scheme employs an inner loop for current gain and an outer loop for PID-controller. The proposed buck converter only uses an inductor, two capacitors and single control circuit to achieve quadratic conversion ratio, therefore, an inductor and a control circuit is reduced. The advantages of the proposed quadratic buck converter are fast transient response, no use for slope-compensation, high-conversion-ratio, and an inductor reduction. The prototype of the proposed quadratic buck converter has been fabricated with TSMC 0.35µm 2P4M CMOS processes. The total chip area is 1.917 × 2.334 mm2.