{"title":"双向电流模多输入最大电路","authors":"Gwo-Jeng Yu, Bin-Da Liu, Chun-Yueh Huang","doi":"10.1109/APASIC.2000.896903","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a current-mode multiple input maximum circuit with bi-directional operation, using 7n+10 transistors for n inputs. Owing to the single-stage architecture, the proposed circuit has the merits of high speed, high accuracy, and no accumulated errors. This circuit has been fabricated in 0.6 /spl mu/m CMOS technology, and the experimental result has verified the bidirectional maximum function of this circuit.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Bi-directional current-mode multiple input maximum circuit\",\"authors\":\"Gwo-Jeng Yu, Bin-Da Liu, Chun-Yueh Huang\",\"doi\":\"10.1109/APASIC.2000.896903\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a current-mode multiple input maximum circuit with bi-directional operation, using 7n+10 transistors for n inputs. Owing to the single-stage architecture, the proposed circuit has the merits of high speed, high accuracy, and no accumulated errors. This circuit has been fabricated in 0.6 /spl mu/m CMOS technology, and the experimental result has verified the bidirectional maximum function of this circuit.\",\"PeriodicalId\":313978,\"journal\":{\"name\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APASIC.2000.896903\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896903","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Bi-directional current-mode multiple input maximum circuit
In this paper, we propose a current-mode multiple input maximum circuit with bi-directional operation, using 7n+10 transistors for n inputs. Owing to the single-stage architecture, the proposed circuit has the merits of high speed, high accuracy, and no accumulated errors. This circuit has been fabricated in 0.6 /spl mu/m CMOS technology, and the experimental result has verified the bidirectional maximum function of this circuit.