J. Viola, E. Baethge, A. Berzoy, J. Restrepo, F. Quizhpi
{"title":"减少传感器数的多电平变换器直流电压估计方法","authors":"J. Viola, E. Baethge, A. Berzoy, J. Restrepo, F. Quizhpi","doi":"10.1109/LASCAS.2014.6820249","DOIUrl":null,"url":null,"abstract":"Two methods for the estimation of the DC voltages in the capacitors associated to the DC buses in a cascaded multilevel converter topology are analyzed. To reduce the number of voltage sensors, available information from inductor currents and line voltage sensors is used as input to a discrete time model of the converter. Additionally, information from the switching state of each converter's cell is used allowing an estimation of voltages in each capacitor. Both methods are developed, implemented and simulated for a 9 level three-phase cascaded multilevel converter when it is operated as a controlled rectifier at unity power factor. The analyzed methods have low computational cost allowing its implementation in real time.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"DC voltage estimation methods for multilevel converter operating with reduced number of sensors\",\"authors\":\"J. Viola, E. Baethge, A. Berzoy, J. Restrepo, F. Quizhpi\",\"doi\":\"10.1109/LASCAS.2014.6820249\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two methods for the estimation of the DC voltages in the capacitors associated to the DC buses in a cascaded multilevel converter topology are analyzed. To reduce the number of voltage sensors, available information from inductor currents and line voltage sensors is used as input to a discrete time model of the converter. Additionally, information from the switching state of each converter's cell is used allowing an estimation of voltages in each capacitor. Both methods are developed, implemented and simulated for a 9 level three-phase cascaded multilevel converter when it is operated as a controlled rectifier at unity power factor. The analyzed methods have low computational cost allowing its implementation in real time.\",\"PeriodicalId\":235336,\"journal\":{\"name\":\"2014 IEEE 5th Latin American Symposium on Circuits and Systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-05-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE 5th Latin American Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LASCAS.2014.6820249\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2014.6820249","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
DC voltage estimation methods for multilevel converter operating with reduced number of sensors
Two methods for the estimation of the DC voltages in the capacitors associated to the DC buses in a cascaded multilevel converter topology are analyzed. To reduce the number of voltage sensors, available information from inductor currents and line voltage sensors is used as input to a discrete time model of the converter. Additionally, information from the switching state of each converter's cell is used allowing an estimation of voltages in each capacitor. Both methods are developed, implemented and simulated for a 9 level three-phase cascaded multilevel converter when it is operated as a controlled rectifier at unity power factor. The analyzed methods have low computational cost allowing its implementation in real time.
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