{"title":"卡西尼号航天器姿态和关节控制子系统的输入输出单元","authors":"E. Shalom","doi":"10.1109/DASC.1995.482920","DOIUrl":null,"url":null,"abstract":"The Input Output Unit (IOU) for the Attitude and Articulation Subsystem (AACS) for the Cassini spacecraft uses an embedded microprocessor to format and interpret data packets sent over a bus with the electrical characteristics of MIL-STD-1553B. The IOU used available design and protocol elements when possible, and employed custom hardware and firmware elements when necessary. As a result, the hardware design of the IOU, including the design of a custom gate array, took place in a extremely short time. With extensive simulation and modeling of the design at both the chip and board level, design iterations were minimal, and there were no iterations of the gate array. The embedded microprocessor in the IOU provides great versatility and flexibility, and allowed the incorporation in many functions in firmware. For this reason, firmware design and verification were challenging linchpins of this effort. This I/O approach is a marked departure from approaches used on previous JPL spacecraft. It has resulted in significant changes in the interfaces of AACS peripherals and their integration at the subsystem level. Future trends are reinforcing this approach, with \"smart\" peripherals and instruments communicating over much higher bandwidth optical buses.","PeriodicalId":125963,"journal":{"name":"Proceedings of 14th Digital Avionics Systems Conference","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"The input output unit for the attitude and articulation control subsystem on the Cassini spacecraft\",\"authors\":\"E. Shalom\",\"doi\":\"10.1109/DASC.1995.482920\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The Input Output Unit (IOU) for the Attitude and Articulation Subsystem (AACS) for the Cassini spacecraft uses an embedded microprocessor to format and interpret data packets sent over a bus with the electrical characteristics of MIL-STD-1553B. The IOU used available design and protocol elements when possible, and employed custom hardware and firmware elements when necessary. As a result, the hardware design of the IOU, including the design of a custom gate array, took place in a extremely short time. With extensive simulation and modeling of the design at both the chip and board level, design iterations were minimal, and there were no iterations of the gate array. The embedded microprocessor in the IOU provides great versatility and flexibility, and allowed the incorporation in many functions in firmware. For this reason, firmware design and verification were challenging linchpins of this effort. This I/O approach is a marked departure from approaches used on previous JPL spacecraft. It has resulted in significant changes in the interfaces of AACS peripherals and their integration at the subsystem level. Future trends are reinforcing this approach, with \\\"smart\\\" peripherals and instruments communicating over much higher bandwidth optical buses.\",\"PeriodicalId\":125963,\"journal\":{\"name\":\"Proceedings of 14th Digital Avionics Systems Conference\",\"volume\":\"77 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-11-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 14th Digital Avionics Systems Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DASC.1995.482920\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 14th Digital Avionics Systems Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DASC.1995.482920","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The input output unit for the attitude and articulation control subsystem on the Cassini spacecraft
The Input Output Unit (IOU) for the Attitude and Articulation Subsystem (AACS) for the Cassini spacecraft uses an embedded microprocessor to format and interpret data packets sent over a bus with the electrical characteristics of MIL-STD-1553B. The IOU used available design and protocol elements when possible, and employed custom hardware and firmware elements when necessary. As a result, the hardware design of the IOU, including the design of a custom gate array, took place in a extremely short time. With extensive simulation and modeling of the design at both the chip and board level, design iterations were minimal, and there were no iterations of the gate array. The embedded microprocessor in the IOU provides great versatility and flexibility, and allowed the incorporation in many functions in firmware. For this reason, firmware design and verification were challenging linchpins of this effort. This I/O approach is a marked departure from approaches used on previous JPL spacecraft. It has resulted in significant changes in the interfaces of AACS peripherals and their integration at the subsystem level. Future trends are reinforcing this approach, with "smart" peripherals and instruments communicating over much higher bandwidth optical buses.