基于高效算术乘积和(SOP)的FFT多重常数乘法(MCM)

V. Karkala, Joseph Wanstrath, Travis Lacour, S. Khatri
{"title":"基于高效算术乘积和(SOP)的FFT多重常数乘法(MCM)","authors":"V. Karkala, Joseph Wanstrath, Travis Lacour, S. Khatri","doi":"10.1109/ICCAD.2010.5654269","DOIUrl":null,"url":null,"abstract":"In this paper, we present an arithmetic sum-of-products (SOP) based realization of the general Multiple Constant Multiplication (MCM) algorithm. We also propose an enhanced SOP based algorithm, which uses Partial Max-SAT (PMSAT) to further optimize the SOP. The enhanced algorithm attempts to reduce the number of rows (partial products) of the SOP, by i) shifting coefficients to realize other coefficients when possible, ii) exploring multiple implementations of each coefficient using a Minimal Signed Digit (MSD) format and iii) exploiting the mutual exclusiveness within certain groups of partial products. Hardware implementations of the Fast Fourier Transform (FFT) algorithm require the incoming data to be multiplied by one of several constant coefficients. We test/validate it for FFT, which is an important problem. We compare our SOP-based architectures with the best existing implementation of MCM for FFT (which utilizes a cascade of adders), and show that our approaches show a significant improvement in area and delay. Our architecture was synthesized using 65nm technology libraries.","PeriodicalId":344703,"journal":{"name":"2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"11 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Efficient arithmetic sum-of-product (SOP) based Multiple Constant Multiplication (MCM) for FFT\",\"authors\":\"V. Karkala, Joseph Wanstrath, Travis Lacour, S. Khatri\",\"doi\":\"10.1109/ICCAD.2010.5654269\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present an arithmetic sum-of-products (SOP) based realization of the general Multiple Constant Multiplication (MCM) algorithm. We also propose an enhanced SOP based algorithm, which uses Partial Max-SAT (PMSAT) to further optimize the SOP. The enhanced algorithm attempts to reduce the number of rows (partial products) of the SOP, by i) shifting coefficients to realize other coefficients when possible, ii) exploring multiple implementations of each coefficient using a Minimal Signed Digit (MSD) format and iii) exploiting the mutual exclusiveness within certain groups of partial products. Hardware implementations of the Fast Fourier Transform (FFT) algorithm require the incoming data to be multiplied by one of several constant coefficients. We test/validate it for FFT, which is an important problem. We compare our SOP-based architectures with the best existing implementation of MCM for FFT (which utilizes a cascade of adders), and show that our approaches show a significant improvement in area and delay. Our architecture was synthesized using 65nm technology libraries.\",\"PeriodicalId\":344703,\"journal\":{\"name\":\"2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)\",\"volume\":\"11 3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAD.2010.5654269\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.2010.5654269","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

摘要

本文提出了一种基于算术积和(SOP)的通用多重常数乘法(MCM)算法的实现方法。我们还提出了一种改进的基于SOP的算法,该算法使用Partial Max-SAT (PMSAT)进一步优化SOP。增强的算法试图减少SOP的行数(部分乘积),通过i)在可能的情况下移动系数以实现其他系数,ii)使用最小符号数字(MSD)格式探索每个系数的多个实现,以及iii)利用某些部分乘积组内的互斥性。快速傅里叶变换(FFT)算法的硬件实现要求输入数据乘以几个常数系数之一。我们对FFT进行了测试/验证,这是一个重要的问题。我们将基于sop的架构与现有最佳的FFT MCM实现(利用级联加法器)进行了比较,并表明我们的方法在面积和延迟方面有显着改善。我们的架构是使用65nm技术库合成的。
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Efficient arithmetic sum-of-product (SOP) based Multiple Constant Multiplication (MCM) for FFT
In this paper, we present an arithmetic sum-of-products (SOP) based realization of the general Multiple Constant Multiplication (MCM) algorithm. We also propose an enhanced SOP based algorithm, which uses Partial Max-SAT (PMSAT) to further optimize the SOP. The enhanced algorithm attempts to reduce the number of rows (partial products) of the SOP, by i) shifting coefficients to realize other coefficients when possible, ii) exploring multiple implementations of each coefficient using a Minimal Signed Digit (MSD) format and iii) exploiting the mutual exclusiveness within certain groups of partial products. Hardware implementations of the Fast Fourier Transform (FFT) algorithm require the incoming data to be multiplied by one of several constant coefficients. We test/validate it for FFT, which is an important problem. We compare our SOP-based architectures with the best existing implementation of MCM for FFT (which utilizes a cascade of adders), and show that our approaches show a significant improvement in area and delay. Our architecture was synthesized using 65nm technology libraries.
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