{"title":"硬件设计语言UDL/I的形式语义的行为模型","authors":"N. Ishiura, H. Yasuura, S. Yajima","doi":"10.1145/123186.123191","DOIUrl":null,"url":null,"abstract":"A new behavioral model of hardware, the NES (nondeterministic event sequence) model, is described. It was developed for the purpose of defining formal semantics of the gate level and the register transfer level hardware description languages. The NES model is a generalization of event driven simulation and can be a basis of synthesis and verification as well as simulation. Basic concepts, formal definition, and a description method of the NES model are introduced.<<ETX>>","PeriodicalId":118552,"journal":{"name":"27th ACM/IEEE Design Automation Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"NES: the behavioral model for the formal semantics of a hardware design language UDL/I\",\"authors\":\"N. Ishiura, H. Yasuura, S. Yajima\",\"doi\":\"10.1145/123186.123191\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new behavioral model of hardware, the NES (nondeterministic event sequence) model, is described. It was developed for the purpose of defining formal semantics of the gate level and the register transfer level hardware description languages. The NES model is a generalization of event driven simulation and can be a basis of synthesis and verification as well as simulation. Basic concepts, formal definition, and a description method of the NES model are introduced.<<ETX>>\",\"PeriodicalId\":118552,\"journal\":{\"name\":\"27th ACM/IEEE Design Automation Conference\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"27th ACM/IEEE Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/123186.123191\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th ACM/IEEE Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/123186.123191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
NES: the behavioral model for the formal semantics of a hardware design language UDL/I
A new behavioral model of hardware, the NES (nondeterministic event sequence) model, is described. It was developed for the purpose of defining formal semantics of the gate level and the register transfer level hardware description languages. The NES model is a generalization of event driven simulation and can be a basis of synthesis and verification as well as simulation. Basic concepts, formal definition, and a description method of the NES model are introduced.<>
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