A. A. Gruszecki, R. Prasad, S. Suryavanshi, G. Yeric, C. D. Young
{"title":"高温下研究CeRAM的测试方法开发","authors":"A. A. Gruszecki, R. Prasad, S. Suryavanshi, G. Yeric, C. D. Young","doi":"10.1109/ICMTS55420.2023.10094065","DOIUrl":null,"url":null,"abstract":"Abstract-Correlated electron RAM (CeRAM) device test structures utilizing C-doped NiO were fabricated and electrically characterized to determine functionality in extreme environments. CeRAM devices were demonstrated to repeatedly cycle at temperatures up to 200°C while maintaining a substantial memory window of over 1000 x. Careful selection of compliance current when sweeping the high resistance state (OFF) is required for optimal device performance. The presence of a temperature dependent leakage current in the OFF state results in reducing OFF resistance at elevated temperatures.","PeriodicalId":275144,"journal":{"name":"2023 35th International Conference on Microelectronic Test Structure (ICMTS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Test Methodology Development for Investigating CeRAM at Elevated Temperatures\",\"authors\":\"A. A. Gruszecki, R. Prasad, S. Suryavanshi, G. Yeric, C. D. Young\",\"doi\":\"10.1109/ICMTS55420.2023.10094065\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Abstract-Correlated electron RAM (CeRAM) device test structures utilizing C-doped NiO were fabricated and electrically characterized to determine functionality in extreme environments. CeRAM devices were demonstrated to repeatedly cycle at temperatures up to 200°C while maintaining a substantial memory window of over 1000 x. Careful selection of compliance current when sweeping the high resistance state (OFF) is required for optimal device performance. The presence of a temperature dependent leakage current in the OFF state results in reducing OFF resistance at elevated temperatures.\",\"PeriodicalId\":275144,\"journal\":{\"name\":\"2023 35th International Conference on Microelectronic Test Structure (ICMTS)\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-03-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 35th International Conference on Microelectronic Test Structure (ICMTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS55420.2023.10094065\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 35th International Conference on Microelectronic Test Structure (ICMTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS55420.2023.10094065","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Test Methodology Development for Investigating CeRAM at Elevated Temperatures
Abstract-Correlated electron RAM (CeRAM) device test structures utilizing C-doped NiO were fabricated and electrically characterized to determine functionality in extreme environments. CeRAM devices were demonstrated to repeatedly cycle at temperatures up to 200°C while maintaining a substantial memory window of over 1000 x. Careful selection of compliance current when sweeping the high resistance state (OFF) is required for optimal device performance. The presence of a temperature dependent leakage current in the OFF state results in reducing OFF resistance at elevated temperatures.
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