{"title":"一种实现CMOS图像传感器高精度测量的双路/多功能精细图形发生器ADC测试技术","authors":"F. Morishita, M. Otsuka, Wataru Saito","doi":"10.1109/ATS49688.2020.9301531","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel circuit and technique for high accuracy measurement of analog-to-digital converters (ADCs) within a CMOS image sensor (CIS) chip. The evaluation of such ADCs has been a big challenge because optical signal source for CIS input is difficult to manage and control. The test circuit provides a dual path, one for normal operation and the other for applying external electrical input signal directly to ADC. This test path also has an ability of multi-functional fine pattern generator that can define any input for each column to evaluate CIS specific characteristics. This test circuit and technique enables the measurement of ADC characteristics directly from CIS chip. Measured result shows INL of 15 LSB, crosstalk of 20 LSB and accelerated column interference of 5 LSB. These measured results agreed with the designed values. With this straightforward circuit and technique, we confirmed the measurement accuracy of 14-bit.","PeriodicalId":220508,"journal":{"name":"2020 IEEE 29th Asian Test Symposium (ATS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An ADC Test Technique With Dual-Path/Multi-Functional Fine Pattern Generator Realizing High Accuracy Measurement for CMOS Image Sensor\",\"authors\":\"F. Morishita, M. Otsuka, Wataru Saito\",\"doi\":\"10.1109/ATS49688.2020.9301531\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a novel circuit and technique for high accuracy measurement of analog-to-digital converters (ADCs) within a CMOS image sensor (CIS) chip. The evaluation of such ADCs has been a big challenge because optical signal source for CIS input is difficult to manage and control. The test circuit provides a dual path, one for normal operation and the other for applying external electrical input signal directly to ADC. This test path also has an ability of multi-functional fine pattern generator that can define any input for each column to evaluate CIS specific characteristics. This test circuit and technique enables the measurement of ADC characteristics directly from CIS chip. Measured result shows INL of 15 LSB, crosstalk of 20 LSB and accelerated column interference of 5 LSB. These measured results agreed with the designed values. With this straightforward circuit and technique, we confirmed the measurement accuracy of 14-bit.\",\"PeriodicalId\":220508,\"journal\":{\"name\":\"2020 IEEE 29th Asian Test Symposium (ATS)\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 29th Asian Test Symposium (ATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS49688.2020.9301531\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 29th Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS49688.2020.9301531","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An ADC Test Technique With Dual-Path/Multi-Functional Fine Pattern Generator Realizing High Accuracy Measurement for CMOS Image Sensor
This paper proposes a novel circuit and technique for high accuracy measurement of analog-to-digital converters (ADCs) within a CMOS image sensor (CIS) chip. The evaluation of such ADCs has been a big challenge because optical signal source for CIS input is difficult to manage and control. The test circuit provides a dual path, one for normal operation and the other for applying external electrical input signal directly to ADC. This test path also has an ability of multi-functional fine pattern generator that can define any input for each column to evaluate CIS specific characteristics. This test circuit and technique enables the measurement of ADC characteristics directly from CIS chip. Measured result shows INL of 15 LSB, crosstalk of 20 LSB and accelerated column interference of 5 LSB. These measured results agreed with the designed values. With this straightforward circuit and technique, we confirmed the measurement accuracy of 14-bit.