{"title":"多步并行10b1.5 µs ADC","authors":"M. Kolluri","doi":"10.1109/ISSCC.1984.1156706","DOIUrl":null,"url":null,"abstract":"The application of a multi-step parallel A/D conversion technique, consisting of a single three-position-switchable current-output DAC, a nonlinearity corrected resistor string and a buffered comparator array, to a 10b 1.5μs ADC, will be described.","PeriodicalId":260117,"journal":{"name":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A multi step parallel 10b 1.5µs ADC\",\"authors\":\"M. Kolluri\",\"doi\":\"10.1109/ISSCC.1984.1156706\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The application of a multi-step parallel A/D conversion technique, consisting of a single three-position-switchable current-output DAC, a nonlinearity corrected resistor string and a buffered comparator array, to a 10b 1.5μs ADC, will be described.\",\"PeriodicalId\":260117,\"journal\":{\"name\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1984.1156706\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1984.1156706","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The application of a multi-step parallel A/D conversion technique, consisting of a single three-position-switchable current-output DAC, a nonlinearity corrected resistor string and a buffered comparator array, to a 10b 1.5μs ADC, will be described.
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