{"title":"无电感900 MHz射频低噪声放大器在0.9 /spl μ m CMOS","authors":"Y. Shin, K. Bult","doi":"10.1109/CICC.1997.606678","DOIUrl":null,"url":null,"abstract":"A low cost 900-MHz RF Low-Noise Amplifier is implemented in a standard 0.9 /spl mu/m digital CMOS process. The design circumvents the use of both expensive external inductors as well as large on-chip inductors, by employing a gyrator circuit to emulate the inductors. This results in a high gain at RF of 20 dB, a tunable resonance frequency and a chip area of only 0.1 mm/sup 2/. At a 940 MHz center frequency, this fully balanced LNA exhibits -23 dB of S11, a 5.3 dB noise figure and an IIP3 of -8.6 dBm. It drains 12.5 mA from a 3.3 V supply.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"An inductorless 900 MHz RF low-noise amplifier in 0.9 /spl mu/m CMOS\",\"authors\":\"Y. Shin, K. Bult\",\"doi\":\"10.1109/CICC.1997.606678\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low cost 900-MHz RF Low-Noise Amplifier is implemented in a standard 0.9 /spl mu/m digital CMOS process. The design circumvents the use of both expensive external inductors as well as large on-chip inductors, by employing a gyrator circuit to emulate the inductors. This results in a high gain at RF of 20 dB, a tunable resonance frequency and a chip area of only 0.1 mm/sup 2/. At a 940 MHz center frequency, this fully balanced LNA exhibits -23 dB of S11, a 5.3 dB noise figure and an IIP3 of -8.6 dBm. It drains 12.5 mA from a 3.3 V supply.\",\"PeriodicalId\":111737,\"journal\":{\"name\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1997.606678\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606678","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An inductorless 900 MHz RF low-noise amplifier in 0.9 /spl mu/m CMOS
A low cost 900-MHz RF Low-Noise Amplifier is implemented in a standard 0.9 /spl mu/m digital CMOS process. The design circumvents the use of both expensive external inductors as well as large on-chip inductors, by employing a gyrator circuit to emulate the inductors. This results in a high gain at RF of 20 dB, a tunable resonance frequency and a chip area of only 0.1 mm/sup 2/. At a 940 MHz center frequency, this fully balanced LNA exhibits -23 dB of S11, a 5.3 dB noise figure and an IIP3 of -8.6 dBm. It drains 12.5 mA from a 3.3 V supply.
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