评估基于RISC和cisc架构的软件容错技术的有效性

M. Rebaudengo, M. Reorda, M. Violante, P. Cheynet, B. Nicolescu, R. Velazco
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引用次数: 12

摘要

本文讨论了一种方法,该方法仅通过修改已执行应用程序的源代码,即可为基于微处理器的系统提供安全功能。该方法利用了一组可自动应用的变换,从而大大降低了设计安全系统的成本,并增加了对其正确性的信心。在基于CISC和RISC处理器的两种不同系统上进行了故障注入实验。结果表明,该方法的有效性与所采用的平台无关。
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Evaluating the effectiveness of a software fault-tolerance technique on RISC- and CISC-based architectures
This paper deals with a method able to provide a microprocessor-based system with safety capabilities by modifying the source code of the executed application, only. The method exploits a set of transformations which can automatically be applied, thus greatly reducing the cost of designing a safe system, and increasing the confidence in its correctness. Fault Injection experiments have been performed on a sample application using two different systems based on CISC and RISC processors. Results demonstrate that the method effectiveness is rather independent of the adopted platform.
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Self-testing of FPGA delay faults in the system environment New self-checking circuits by use of Berger-codes On-line current testing for a microprocessor based application with an off-chip sensor Evaluating the effectiveness of a software fault-tolerance technique on RISC- and CISC-based architectures A compact built-in current sensor for I/sub DDQ/ testing
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