S. Parthasarathy, R. Shumovich, J. Salcedo, Roxann Broughton-Blanchard, J. Hajjar
{"title":"在FinFET工艺技术中保护高频和高数据速率接口应用的装置","authors":"S. Parthasarathy, R. Shumovich, J. Salcedo, Roxann Broughton-Blanchard, J. Hajjar","doi":"10.1109/RFIC54546.2022.9863162","DOIUrl":null,"url":null,"abstract":"The relatively poor ESD robustness of many RF ports is a direct result of the performance degradation introduced by traditional ESD diodes. The later limits the amount of ESD protection that can be tolerated in RF applications. This paper introduces a ground-referenced low capacitance and highly linear Silicon Controlled Rectifiers (SCR) topology designed in l6nm CMOS FinFET process technology. The device presented in this work is employed to protect RF ports with asymmetrical signal swings in the range of + 3.0V /-l.0V operating to 20 GHz with a 3rd order linearity specification requirement of −75dBc or greater.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"341 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Device for Protecting High Frequency and High Data Rate Interface Applications in FinFET Process Technologies\",\"authors\":\"S. Parthasarathy, R. Shumovich, J. Salcedo, Roxann Broughton-Blanchard, J. Hajjar\",\"doi\":\"10.1109/RFIC54546.2022.9863162\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The relatively poor ESD robustness of many RF ports is a direct result of the performance degradation introduced by traditional ESD diodes. The later limits the amount of ESD protection that can be tolerated in RF applications. This paper introduces a ground-referenced low capacitance and highly linear Silicon Controlled Rectifiers (SCR) topology designed in l6nm CMOS FinFET process technology. The device presented in this work is employed to protect RF ports with asymmetrical signal swings in the range of + 3.0V /-l.0V operating to 20 GHz with a 3rd order linearity specification requirement of −75dBc or greater.\",\"PeriodicalId\":415294,\"journal\":{\"name\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"341 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC54546.2022.9863162\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863162","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Device for Protecting High Frequency and High Data Rate Interface Applications in FinFET Process Technologies
The relatively poor ESD robustness of many RF ports is a direct result of the performance degradation introduced by traditional ESD diodes. The later limits the amount of ESD protection that can be tolerated in RF applications. This paper introduces a ground-referenced low capacitance and highly linear Silicon Controlled Rectifiers (SCR) topology designed in l6nm CMOS FinFET process technology. The device presented in this work is employed to protect RF ports with asymmetrical signal swings in the range of + 3.0V /-l.0V operating to 20 GHz with a 3rd order linearity specification requirement of −75dBc or greater.