H. Akita, S. Eto, K. Isobe, K. Tsuchida, H. Toda, T. Seki
{"title":"一种适用于低压运行的新型自校准模拟镜式动态链接库","authors":"H. Akita, S. Eto, K. Isobe, K. Tsuchida, H. Toda, T. Seki","doi":"10.1109/APASIC.2000.896978","DOIUrl":null,"url":null,"abstract":"A new architecture of the analog mirror type DLL has been developed. A dynamic comparator and self-calibration feedback loop are employed. The operation error of less than 50ps is confirmed under the condition of 1.6V supply voltage and 1.4V internal voltage. The proposed circuit is suitable for low-voltage and high-speed applications.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A novel analog mirror type DLL suitable for low voltage operation with self-calibration method\",\"authors\":\"H. Akita, S. Eto, K. Isobe, K. Tsuchida, H. Toda, T. Seki\",\"doi\":\"10.1109/APASIC.2000.896978\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new architecture of the analog mirror type DLL has been developed. A dynamic comparator and self-calibration feedback loop are employed. The operation error of less than 50ps is confirmed under the condition of 1.6V supply voltage and 1.4V internal voltage. The proposed circuit is suitable for low-voltage and high-speed applications.\",\"PeriodicalId\":313978,\"journal\":{\"name\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APASIC.2000.896978\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896978","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel analog mirror type DLL suitable for low voltage operation with self-calibration method
A new architecture of the analog mirror type DLL has been developed. A dynamic comparator and self-calibration feedback loop are employed. The operation error of less than 50ps is confirmed under the condition of 1.6V supply voltage and 1.4V internal voltage. The proposed circuit is suitable for low-voltage and high-speed applications.