一种采用三电平量化器的25khz三阶连续δ - σ调制器

Daxiang Li, K. Pun
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引用次数: 0

摘要

本文提出了一种带三电平量化器的三阶连续时间Delta-Sigma调制器,该调制器在不需要动态单元匹配(DEM)的情况下可将量化噪声降低3db。分析了三电平DAC的线性度,表明在全差分有源rc δ - σ调制器中可以实现高度线性的三电平DAC。采用标准的0.18 μm CMOS工艺对三电平连续时间Delta-Sigma调制器的性能进行了仿真验证。在3.2 ms /s的采样率下实现81 db的SNDR,理想放大器功耗为1.14 μ w。
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A 25-kHz 3rd-order continuous-time Delta-Sigma modulator using tri-level quantizer
This paper presents a 3rd order continuous-time Delta-Sigma modulator with a tri-level quantizer, which provides 3-dB reduction of quantization noise without dynamic element matching (DEM). The tri-level DAC linearity is analyzed and it shows that a highly linear tri-level DAC can be realized in fully-differential active-RC Delta-Sigma modulator. The performance of the tri-level continuous-time Delta-Sigma modulator has been verified through simulations using a standard 0.18-μm CMOS process. It achieves 81-dB SNDR at 3.2-MS/s sampling rate and consumes 1.14-μW power with ideal amplifier.
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