{"title":"一种采用三电平量化器的25khz三阶连续δ - σ调制器","authors":"Daxiang Li, K. Pun","doi":"10.1109/ISNE.2016.7543371","DOIUrl":null,"url":null,"abstract":"This paper presents a 3rd order continuous-time Delta-Sigma modulator with a tri-level quantizer, which provides 3-dB reduction of quantization noise without dynamic element matching (DEM). The tri-level DAC linearity is analyzed and it shows that a highly linear tri-level DAC can be realized in fully-differential active-RC Delta-Sigma modulator. The performance of the tri-level continuous-time Delta-Sigma modulator has been verified through simulations using a standard 0.18-μm CMOS process. It achieves 81-dB SNDR at 3.2-MS/s sampling rate and consumes 1.14-μW power with ideal amplifier.","PeriodicalId":127324,"journal":{"name":"2016 5th International Symposium on Next-Generation Electronics (ISNE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 25-kHz 3rd-order continuous-time Delta-Sigma modulator using tri-level quantizer\",\"authors\":\"Daxiang Li, K. Pun\",\"doi\":\"10.1109/ISNE.2016.7543371\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 3rd order continuous-time Delta-Sigma modulator with a tri-level quantizer, which provides 3-dB reduction of quantization noise without dynamic element matching (DEM). The tri-level DAC linearity is analyzed and it shows that a highly linear tri-level DAC can be realized in fully-differential active-RC Delta-Sigma modulator. The performance of the tri-level continuous-time Delta-Sigma modulator has been verified through simulations using a standard 0.18-μm CMOS process. It achieves 81-dB SNDR at 3.2-MS/s sampling rate and consumes 1.14-μW power with ideal amplifier.\",\"PeriodicalId\":127324,\"journal\":{\"name\":\"2016 5th International Symposium on Next-Generation Electronics (ISNE)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 5th International Symposium on Next-Generation Electronics (ISNE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISNE.2016.7543371\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 5th International Symposium on Next-Generation Electronics (ISNE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2016.7543371","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 25-kHz 3rd-order continuous-time Delta-Sigma modulator using tri-level quantizer
This paper presents a 3rd order continuous-time Delta-Sigma modulator with a tri-level quantizer, which provides 3-dB reduction of quantization noise without dynamic element matching (DEM). The tri-level DAC linearity is analyzed and it shows that a highly linear tri-level DAC can be realized in fully-differential active-RC Delta-Sigma modulator. The performance of the tri-level continuous-time Delta-Sigma modulator has been verified through simulations using a standard 0.18-μm CMOS process. It achieves 81-dB SNDR at 3.2-MS/s sampling rate and consumes 1.14-μW power with ideal amplifier.
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