一个2 v 23 /spl mu/A 5.3 ppm//spl度/C四阶曲率补偿CMOS带隙基准

K. Leung, P. Mok, Chi Yat Leung
{"title":"一个2 v 23 /spl mu/A 5.3 ppm//spl度/C四阶曲率补偿CMOS带隙基准","authors":"K. Leung, P. Mok, Chi Yat Leung","doi":"10.1109/CICC.2002.1012875","DOIUrl":null,"url":null,"abstract":"A 4th-order curvature-compensated CMOS bandgap reference, which uses a high-resistive poly resistor to a generate temperature dependent resistor ratio, is proposed. The proposed reference can operate down to a 2-V supply and consumes a maximum supply current of 23 /spl mu/A. A temperature coefficient of 5.3 ppm//spl deg/C and a line regulation of /spl plusmn/1.25 mV/V are achieved at 2-V supply. The improvement on temperature coefficient is about 5 times reduction compared to the conventional approach.","PeriodicalId":209025,"journal":{"name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"A 2-V 23-/spl mu/A 5.3-ppm//spl deg/C 4th-order curvature-compensated CMOS bandgap reference\",\"authors\":\"K. Leung, P. Mok, Chi Yat Leung\",\"doi\":\"10.1109/CICC.2002.1012875\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 4th-order curvature-compensated CMOS bandgap reference, which uses a high-resistive poly resistor to a generate temperature dependent resistor ratio, is proposed. The proposed reference can operate down to a 2-V supply and consumes a maximum supply current of 23 /spl mu/A. A temperature coefficient of 5.3 ppm//spl deg/C and a line regulation of /spl plusmn/1.25 mV/V are achieved at 2-V supply. The improvement on temperature coefficient is about 5 times reduction compared to the conventional approach.\",\"PeriodicalId\":209025,\"journal\":{\"name\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2002.1012875\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2002.1012875","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16

摘要

提出了一种四阶曲率补偿的CMOS带隙基准,该基准采用高阻多晶硅电阻产生温度相关电阻比。所提出的基准可以低至2v电源,并消耗23 /spl mu/ a的最大电源电流。温度系数为5.3 ppm//spl度/C,线路调节为/spl plusmn/1.25 mV/V。改进后的温度系数比传统方法降低了约5倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
A 2-V 23-/spl mu/A 5.3-ppm//spl deg/C 4th-order curvature-compensated CMOS bandgap reference
A 4th-order curvature-compensated CMOS bandgap reference, which uses a high-resistive poly resistor to a generate temperature dependent resistor ratio, is proposed. The proposed reference can operate down to a 2-V supply and consumes a maximum supply current of 23 /spl mu/A. A temperature coefficient of 5.3 ppm//spl deg/C and a line regulation of /spl plusmn/1.25 mV/V are achieved at 2-V supply. The improvement on temperature coefficient is about 5 times reduction compared to the conventional approach.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A signal integrity-driven buffer insertion technique for post-routing noise and delay optimization Modularized low temperature LNO/PZT/LNO ferroelectric capacitor-over-interconnect (COI) FeRAM for advanced SOC (ASOC) application SOI Hall effect sensor operating up to 270/spl deg/C A 402-output TFT-LCD driver IC with power-controlling function by selecting number of colors Understanding MOSFET mismatch for analog design
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1