低温下集成CMOS电路的工程TID建模和性能评估

2019 19th European Conference on Radiation and Its Effects on Components and Systems (RADECS) Pub Date : 2019-09-01 DOI:10.1109/radecs47380.2019.9745704

L. Artola, S. Ducret, G. Hubert

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摘要

本文提出了一种基于钴60辐照n-MOS和p-MOS晶体管的总电离剂量(TID)建模方法。建立了用于研究读出集成电路(ROIC)中互补金属氧化物半导体(CMOS)栅极在低温下的性能的TID模型。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Engineering TID modeling for the SEE and performances evaluations of integrated CMOS circuits at cryogenic temperatures

This paper presents a total ionizing dose (TID) modeling approach based on experimental Cobalt60 irradiations of n-MOS and p-MOS transistors. The TID models were developed for the investigation of complementary metal oxide semiconductor (CMOS) gates performances used in a readout integrated circuit (ROIC) at cryogenic temperatures.

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2019 19th European Conference on Radiation and Its Effects on Components and Systems (RADECS)

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