G. Tant, A. Giry, P. Vincent, J. Arnould, J. Fournier
{"title":"基于SOI CMOS技术的无源负载调制2.14GHz瓦级功率放大器","authors":"G. Tant, A. Giry, P. Vincent, J. Arnould, J. Fournier","doi":"10.1109/ESSCIRC.2013.6649104","DOIUrl":null,"url":null,"abstract":"This paper presents the implementation and measurement results of a power amplifier with passive load modulation targeting Femtocell base station applications and integrated in SOI CMOS 130nm process. The proposed structure combines a SOI LDMOS power stage with a SOI CMOS Tunable Matching Network (TMN) based on high voltage switched capacitors in order to improve PA efficiency at back-off power. At 2.14GHz, the PA achieves 31.5dBm of measured peak power under 4V supply and compared to a conventional PA with fixed output matching network, the measured efficiency improvement is 60 % at 8.5 dB back-off.","PeriodicalId":183620,"journal":{"name":"2013 Proceedings of the ESSCIRC (ESSCIRC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 2.14GHz watt-level power amplifier with passive load modulation in a SOI CMOS technology\",\"authors\":\"G. Tant, A. Giry, P. Vincent, J. Arnould, J. Fournier\",\"doi\":\"10.1109/ESSCIRC.2013.6649104\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the implementation and measurement results of a power amplifier with passive load modulation targeting Femtocell base station applications and integrated in SOI CMOS 130nm process. The proposed structure combines a SOI LDMOS power stage with a SOI CMOS Tunable Matching Network (TMN) based on high voltage switched capacitors in order to improve PA efficiency at back-off power. At 2.14GHz, the PA achieves 31.5dBm of measured peak power under 4V supply and compared to a conventional PA with fixed output matching network, the measured efficiency improvement is 60 % at 8.5 dB back-off.\",\"PeriodicalId\":183620,\"journal\":{\"name\":\"2013 Proceedings of the ESSCIRC (ESSCIRC)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Proceedings of the ESSCIRC (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2013.6649104\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2013.6649104","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 2.14GHz watt-level power amplifier with passive load modulation in a SOI CMOS technology
This paper presents the implementation and measurement results of a power amplifier with passive load modulation targeting Femtocell base station applications and integrated in SOI CMOS 130nm process. The proposed structure combines a SOI LDMOS power stage with a SOI CMOS Tunable Matching Network (TMN) based on high voltage switched capacitors in order to improve PA efficiency at back-off power. At 2.14GHz, the PA achieves 31.5dBm of measured peak power under 4V supply and compared to a conventional PA with fixed output matching network, the measured efficiency improvement is 60 % at 8.5 dB back-off.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
