绝缘金属基板上表面贴装片式电阻/电容的焊点可靠性

J. Suhling, R.W. Johnson, J. White, K.W. Matthai, R. Knight, C. S. Romanczuk, S.W. Burcham
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引用次数: 10

摘要

为了增强传热,绝缘金属基板是传统上用于汽车发动机控制器的FR-4印刷电路板的有吸引力的替代品。尽管从增强热性能的角度来看,铝相对于FR-4板的高热膨胀系数导致表面贴装焊料连接在热循环下疲劳失效的可能性增加。在这项工作中,使用有限元建模和实际寿命试验研究了用于连接元件到绝缘金属基板上的焊点的热疲劳寿命和可靠性。特别地,本研究检验了陶瓷片式电阻和片式电容器的焊接连接的可靠性。对金属绝缘衬底上的片式电阻器和片式电容器分别建立了二维(平面应力和平面应变)和三维非线性有限元模型。几种常见尺寸的电阻器/电容器已经建模,包括1206,0805,0603和0402。有限元模型的属性包括弹塑性焊料本构行为、大变形和热循环。利用Coffin-Manson型疲劳模型中预测的塑性应变估计了焊点疲劳裂纹的起始点。有限元分析的疲劳寿命预测与焊点裂纹萌生和实际构件在热循环下的寿命测量相关联。已经考虑了各种衬底材料,电阻/电容器尺寸和封装剂的广泛测试配置矩阵。
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Solder joint reliability of surface mount chip resistors/capacitors on insulated metal substrates
For enhanced heat transfer, insulated metal substrates are attractive alternatives to the FR-4 printed circuit boards which have been conventionally used in automotive engine controllers. Although appealing from the viewpoint of enhanced thermal performance, the high coefficient of thermal expansion of aluminum relative that of FR-4 boards leads to a increased probability of fatigue failures of surface mount solder connections subjected to thermal cycling. In this work, the thermal fatigue life and reliability of solder joints used to attach components to insulated metal substrates has been studied using finite element modeling and actual life testing. In particular, this investigation has examined the reliability of solder connections for ceramic chip resistors and chip capacitors. Several two-dimensional (plane stress and plane strain) and three-dimensional nonlinear finite element models have been prepared and executed for both chip resistors and chip capacitors on insulated metal substrates. Several common sizes of the resistors/capacitors have been modeled including 1206, 0805, 0603, and 0402. Attributes of the finite element models included elastic-plastic solder constitutive behavior, large deformations, and thermal cycling. Initiation of solder joint fatigue cracking was estimated using the predicted plastic strains within a Coffin-Manson type fatigue model. The fatigue life predictions of the finite element analyses have been correlated with solder joint crack initiation and life measurements for actual components under thermal cycling. A broad matrix of test configurations with various substrate materials, resistor/capacitor sizes, and encapsulants has been considered.<>
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Development of a tapeless lead-on-chip (LOC) package A photosensitive-BCB on laminate technology (MCM-LD) A PC program that generates a model of the parasitics for IC packages Compact planar optical devices (CPODs) by CVD technology Predicting solder joint shape by computer modeling
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