{"title":"时序电路延迟故障测试产生的功能方法","authors":"F. Fummi, D. Sciuto, M. Serra","doi":"10.1109/EDTC.1994.326899","DOIUrl":null,"url":null,"abstract":"In this paper we present an analysis of the coverage of delay faults in sequential circuits by a functional test pattern generator. Relationships are investigated between a functional fault model and delay faults, with correlations to the stuck-at fault coverage. Undetected faults are identified and an algorithm to improve the delay fault coverage is proposed. The final approach generates a functional test for sequential circuits with optimization and reaches complete coverage of detectable delay faults with short tests.<<ETX>>","PeriodicalId":244297,"journal":{"name":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A functional approach to delay faults test generation for sequential circuits\",\"authors\":\"F. Fummi, D. Sciuto, M. Serra\",\"doi\":\"10.1109/EDTC.1994.326899\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present an analysis of the coverage of delay faults in sequential circuits by a functional test pattern generator. Relationships are investigated between a functional fault model and delay faults, with correlations to the stuck-at fault coverage. Undetected faults are identified and an algorithm to improve the delay fault coverage is proposed. The final approach generates a functional test for sequential circuits with optimization and reaches complete coverage of detectable delay faults with short tests.<<ETX>>\",\"PeriodicalId\":244297,\"journal\":{\"name\":\"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-02-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDTC.1994.326899\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1994.326899","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A functional approach to delay faults test generation for sequential circuits
In this paper we present an analysis of the coverage of delay faults in sequential circuits by a functional test pattern generator. Relationships are investigated between a functional fault model and delay faults, with correlations to the stuck-at fault coverage. Undetected faults are identified and an algorithm to improve the delay fault coverage is proposed. The final approach generates a functional test for sequential circuits with optimization and reaches complete coverage of detectable delay faults with short tests.<>