Sara Pellegrini, Bruce Rae, A. Pingault, D. Golanski, S. Jouan, C. Lapeyre, B. Mamdy
{"title":"工业化的SPAD采用40纳米技术","authors":"Sara Pellegrini, Bruce Rae, A. Pingault, D. Golanski, S. Jouan, C. Lapeyre, B. Mamdy","doi":"10.1109/IEDM.2017.8268404","DOIUrl":null,"url":null,"abstract":"We present the first mature SPAD device in advanced 40 nm technology. For the first time we also show dedicated microlens fabrication on top of SPADs integrated in the same technology node. A high fill factor >70% is reported together with a low DCR median of 50cps at room temperature and a high PDP of 5% at 840nm. By taking advantage of the small digital node, a larger amount of logic can be integrated inside the pixel, which is ready to be ported to a 3D stacked technology, where the logic is implemented in a fully digital dedicated layer [1].","PeriodicalId":412333,"journal":{"name":"2017 IEEE International Electron Devices Meeting (IEDM)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"44","resultStr":"{\"title\":\"Industrialised SPAD in 40 nm technology\",\"authors\":\"Sara Pellegrini, Bruce Rae, A. Pingault, D. Golanski, S. Jouan, C. Lapeyre, B. Mamdy\",\"doi\":\"10.1109/IEDM.2017.8268404\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present the first mature SPAD device in advanced 40 nm technology. For the first time we also show dedicated microlens fabrication on top of SPADs integrated in the same technology node. A high fill factor >70% is reported together with a low DCR median of 50cps at room temperature and a high PDP of 5% at 840nm. By taking advantage of the small digital node, a larger amount of logic can be integrated inside the pixel, which is ready to be ported to a 3D stacked technology, where the logic is implemented in a fully digital dedicated layer [1].\",\"PeriodicalId\":412333,\"journal\":{\"name\":\"2017 IEEE International Electron Devices Meeting (IEDM)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"44\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE International Electron Devices Meeting (IEDM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2017.8268404\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2017.8268404","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We present the first mature SPAD device in advanced 40 nm technology. For the first time we also show dedicated microlens fabrication on top of SPADs integrated in the same technology node. A high fill factor >70% is reported together with a low DCR median of 50cps at room temperature and a high PDP of 5% at 840nm. By taking advantage of the small digital node, a larger amount of logic can be integrated inside the pixel, which is ready to be ported to a 3D stacked technology, where the logic is implemented in a fully digital dedicated layer [1].
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