{"title":"通过SIPD联合分析和综合平台验证的下一代I/O电源交付设计","authors":"Y. H. Tau, M. Chan","doi":"10.1109/EPEPS.2009.5338441","DOIUrl":null,"url":null,"abstract":"This paper illustrates many different approaches in solving I/O power delivery noise issues and walk through pre-silicon design solution. It covers circuit and architectural design influence, on silicon and on board decoupling solutions selection and package and platform design optimization. SIPD co-simulations and appropriate package return path are the main topic to discuss in this paper and certainly impedance (Z) profile and transient analysis will be performed to observe the noise frequency and accurately address the root cause. All the above will be verified through comprehensive validation data.","PeriodicalId":437303,"journal":{"name":"2009 1st Asia Symposium on Quality Electronic Design","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Next generation I/O power delivery design through SIPD co-analysis & comprehensive platform validation\",\"authors\":\"Y. H. Tau, M. Chan\",\"doi\":\"10.1109/EPEPS.2009.5338441\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper illustrates many different approaches in solving I/O power delivery noise issues and walk through pre-silicon design solution. It covers circuit and architectural design influence, on silicon and on board decoupling solutions selection and package and platform design optimization. SIPD co-simulations and appropriate package return path are the main topic to discuss in this paper and certainly impedance (Z) profile and transient analysis will be performed to observe the noise frequency and accurately address the root cause. All the above will be verified through comprehensive validation data.\",\"PeriodicalId\":437303,\"journal\":{\"name\":\"2009 1st Asia Symposium on Quality Electronic Design\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-11-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 1st Asia Symposium on Quality Electronic Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEPS.2009.5338441\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 1st Asia Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2009.5338441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Next generation I/O power delivery design through SIPD co-analysis & comprehensive platform validation
This paper illustrates many different approaches in solving I/O power delivery noise issues and walk through pre-silicon design solution. It covers circuit and architectural design influence, on silicon and on board decoupling solutions selection and package and platform design optimization. SIPD co-simulations and appropriate package return path are the main topic to discuss in this paper and certainly impedance (Z) profile and transient analysis will be performed to observe the noise frequency and accurately address the root cause. All the above will be verified through comprehensive validation data.