CMOS直接下变频器中IIP2的分析与优化

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012805

D. Manstretta, F. Svelto

{"title":"CMOS直接下变频器中IIP2的分析与优化","authors":"D. Manstretta, F. Svelto","doi":"10.1109/CICC.2002.1012805","DOIUrl":null,"url":null,"abstract":"Two mechanisms are responsible for second order intermodulation in CMOS down-converters: RF self-mixing and device non-linearity and mismatches. An intuitive model and analytical expressions are provided for both of them. A down-converter prototype, drawing 3.2 mA from a 1.8 V supply, part of a fully integrated 0.18 /spl mu/m CMOS UMTS receiver front-end shows 66 dBm IIP2 and 16 dBm IIP3.","PeriodicalId":209025,"journal":{"name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":"{\"title\":\"Analysis and optimization of IIP2 in CMOS direct down-converters\",\"authors\":\"D. Manstretta, F. Svelto\",\"doi\":\"10.1109/CICC.2002.1012805\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two mechanisms are responsible for second order intermodulation in CMOS down-converters: RF self-mixing and device non-linearity and mismatches. An intuitive model and analytical expressions are provided for both of them. A down-converter prototype, drawing 3.2 mA from a 1.8 V supply, part of a fully integrated 0.18 /spl mu/m CMOS UMTS receiver front-end shows 66 dBm IIP2 and 16 dBm IIP3.\",\"PeriodicalId\":209025,\"journal\":{\"name\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"22\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2002.1012805\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2002.1012805","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 22

摘要

两种机制负责二阶互调在CMOS下变频器:射频自混频和器件非线性和不匹配。给出了直观的模型和解析表达式。下变频器原型，从1.8 V电源汲取3.2 mA，完全集成的0.18 /spl mu/m CMOS UMTS接收器前端的一部分显示66 dBm IIP2和16 dBm IIP3。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

Analysis and optimization of IIP2 in CMOS direct down-converters

Two mechanisms are responsible for second order intermodulation in CMOS down-converters: RF self-mixing and device non-linearity and mismatches. An intuitive model and analytical expressions are provided for both of them. A down-converter prototype, drawing 3.2 mA from a 1.8 V supply, part of a fully integrated 0.18 /spl mu/m CMOS UMTS receiver front-end shows 66 dBm IIP2 and 16 dBm IIP3.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

自引率

0.00%

发文量