{"title":"亚微米BICMOS兼容高压MOS晶体管","authors":"Y. Li, C. Salama, M. Seufert, M. King","doi":"10.1109/ISPSD.1994.583776","DOIUrl":null,"url":null,"abstract":"The design and implementation of high-voltage MOS transistors fully compatible with 0.8 /spl mu/m BICMOS technology is considered in this paper. Two-dimensional simulations were used in the design of the structures. Three different structures are presented. The results indicate that it is possible to implement MOS devices with a pitch of 8 /spl mu/m, breakdown voltage of the order of 20 to 50 V and specific on-resistance of the order of 0.8 to 10 m/spl Omega/ cm/sup 2/ by minor layout modifications and without changes in the process itself.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Submicron BICMOS compatible high voltage MOS transistors\",\"authors\":\"Y. Li, C. Salama, M. Seufert, M. King\",\"doi\":\"10.1109/ISPSD.1994.583776\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design and implementation of high-voltage MOS transistors fully compatible with 0.8 /spl mu/m BICMOS technology is considered in this paper. Two-dimensional simulations were used in the design of the structures. Three different structures are presented. The results indicate that it is possible to implement MOS devices with a pitch of 8 /spl mu/m, breakdown voltage of the order of 20 to 50 V and specific on-resistance of the order of 0.8 to 10 m/spl Omega/ cm/sup 2/ by minor layout modifications and without changes in the process itself.\",\"PeriodicalId\":405897,\"journal\":{\"name\":\"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-05-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.1994.583776\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1994.583776","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Submicron BICMOS compatible high voltage MOS transistors
The design and implementation of high-voltage MOS transistors fully compatible with 0.8 /spl mu/m BICMOS technology is considered in this paper. Two-dimensional simulations were used in the design of the structures. Three different structures are presented. The results indicate that it is possible to implement MOS devices with a pitch of 8 /spl mu/m, breakdown voltage of the order of 20 to 50 V and specific on-resistance of the order of 0.8 to 10 m/spl Omega/ cm/sup 2/ by minor layout modifications and without changes in the process itself.
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