{"title":"超高速ram的机遇与局限","authors":"W. Herndon","doi":"10.1109/ISSCC.1984.1156696","DOIUrl":null,"url":null,"abstract":"Several design approaches and technologies have shown impressive abilities to produce SRAMs with densities greater than 1Kb and access times less than 25ns. Panelists will examine opportunities to develop further these technologies and produce a density of ≥64Kb and access time of ≤5ns. Issues to be probed include the access time of merged bipolar memories and the cell sizes and economics of GaAs memories.","PeriodicalId":260117,"journal":{"name":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Opportunities and limitations in ultra high speed SRAMs\",\"authors\":\"W. Herndon\",\"doi\":\"10.1109/ISSCC.1984.1156696\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Several design approaches and technologies have shown impressive abilities to produce SRAMs with densities greater than 1Kb and access times less than 25ns. Panelists will examine opportunities to develop further these technologies and produce a density of ≥64Kb and access time of ≤5ns. Issues to be probed include the access time of merged bipolar memories and the cell sizes and economics of GaAs memories.\",\"PeriodicalId\":260117,\"journal\":{\"name\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1984.1156696\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1984.1156696","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Opportunities and limitations in ultra high speed SRAMs
Several design approaches and technologies have shown impressive abilities to produce SRAMs with densities greater than 1Kb and access times less than 25ns. Panelists will examine opportunities to develop further these technologies and produce a density of ≥64Kb and access time of ≤5ns. Issues to be probed include the access time of merged bipolar memories and the cell sizes and economics of GaAs memories.
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