{"title":"CMOS低跨导电压电流变换器的设计","authors":"Sharil Nivitha Rodrigues, P. Sushma, S. Kulkarni","doi":"10.1109/ICATIECE45860.2019.9063809","DOIUrl":null,"url":null,"abstract":"For biomedical applications low power and low transconductance linear transconductor is required. In this paper a low transconductance and high gain transconductance is designed based on based on gate driven input stage for basic Miller OTA. The circuit is then modified to achieve very low transconductance using series parallel PMOS differential current pair technique. The circuits are designed in gpdk 180nm CMOS technology.","PeriodicalId":106496,"journal":{"name":"2019 1st International Conference on Advanced Technologies in Intelligent Control, Environment, Computing & Communication Engineering (ICATIECE)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of Low Transconductance Voltage to Current Converter in CMOS\",\"authors\":\"Sharil Nivitha Rodrigues, P. Sushma, S. Kulkarni\",\"doi\":\"10.1109/ICATIECE45860.2019.9063809\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For biomedical applications low power and low transconductance linear transconductor is required. In this paper a low transconductance and high gain transconductance is designed based on based on gate driven input stage for basic Miller OTA. The circuit is then modified to achieve very low transconductance using series parallel PMOS differential current pair technique. The circuits are designed in gpdk 180nm CMOS technology.\",\"PeriodicalId\":106496,\"journal\":{\"name\":\"2019 1st International Conference on Advanced Technologies in Intelligent Control, Environment, Computing & Communication Engineering (ICATIECE)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 1st International Conference on Advanced Technologies in Intelligent Control, Environment, Computing & Communication Engineering (ICATIECE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICATIECE45860.2019.9063809\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 1st International Conference on Advanced Technologies in Intelligent Control, Environment, Computing & Communication Engineering (ICATIECE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICATIECE45860.2019.9063809","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of Low Transconductance Voltage to Current Converter in CMOS
For biomedical applications low power and low transconductance linear transconductor is required. In this paper a low transconductance and high gain transconductance is designed based on based on gate driven input stage for basic Miller OTA. The circuit is then modified to achieve very low transconductance using series parallel PMOS differential current pair technique. The circuits are designed in gpdk 180nm CMOS technology.
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