{"title":"射频功率放大器线性化的实时数字预失真","authors":"S. Ferguson, A. Chopra","doi":"10.1109/IEEE-IWS.2016.7585463","DOIUrl":null,"url":null,"abstract":"In this paper, a system is proposed for real-time calculation of digital predistortion (DPD) coefficients to linearize wideband radio frequency (RF) power amplifiers (PAs). The proposed system leverages the commercially available National Instruments (NI) PXIe-5646R vector signal transceiver (VST) platform. The VST is a single module RF instrument that combines a 200MHz instantaneous vector signal analyzer (VSA) and vector signal generator (VSG) with a shared Xilinx LX240T field-programmable gate array (FPGA). The FPGA is used to perform look-up table (LUT) predistorter estimation and predistortion in real-time. The proposed system is shown to reduce the time to generate a predistorted waveform by over two orders of magnitude compared to a software implementation. Furthermore, the linearity achieved with the proposed FPGA implementation closely matches a traditional software-based approach, with 15dB improvement in adjacent channel leakage ratio (ACLR) and a 3x improvement in error vector magnitude (EVM) for a 3G mobile handset power amplifier.","PeriodicalId":185971,"journal":{"name":"2016 IEEE MTT-S International Wireless Symposium (IWS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Real-time digital predistortion for radio frequency power amplifier linearization\",\"authors\":\"S. Ferguson, A. Chopra\",\"doi\":\"10.1109/IEEE-IWS.2016.7585463\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a system is proposed for real-time calculation of digital predistortion (DPD) coefficients to linearize wideband radio frequency (RF) power amplifiers (PAs). The proposed system leverages the commercially available National Instruments (NI) PXIe-5646R vector signal transceiver (VST) platform. The VST is a single module RF instrument that combines a 200MHz instantaneous vector signal analyzer (VSA) and vector signal generator (VSG) with a shared Xilinx LX240T field-programmable gate array (FPGA). The FPGA is used to perform look-up table (LUT) predistorter estimation and predistortion in real-time. The proposed system is shown to reduce the time to generate a predistorted waveform by over two orders of magnitude compared to a software implementation. Furthermore, the linearity achieved with the proposed FPGA implementation closely matches a traditional software-based approach, with 15dB improvement in adjacent channel leakage ratio (ACLR) and a 3x improvement in error vector magnitude (EVM) for a 3G mobile handset power amplifier.\",\"PeriodicalId\":185971,\"journal\":{\"name\":\"2016 IEEE MTT-S International Wireless Symposium (IWS)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-03-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE MTT-S International Wireless Symposium (IWS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEEE-IWS.2016.7585463\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE MTT-S International Wireless Symposium (IWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEEE-IWS.2016.7585463","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Real-time digital predistortion for radio frequency power amplifier linearization
In this paper, a system is proposed for real-time calculation of digital predistortion (DPD) coefficients to linearize wideband radio frequency (RF) power amplifiers (PAs). The proposed system leverages the commercially available National Instruments (NI) PXIe-5646R vector signal transceiver (VST) platform. The VST is a single module RF instrument that combines a 200MHz instantaneous vector signal analyzer (VSA) and vector signal generator (VSG) with a shared Xilinx LX240T field-programmable gate array (FPGA). The FPGA is used to perform look-up table (LUT) predistorter estimation and predistortion in real-time. The proposed system is shown to reduce the time to generate a predistorted waveform by over two orders of magnitude compared to a software implementation. Furthermore, the linearity achieved with the proposed FPGA implementation closely matches a traditional software-based approach, with 15dB improvement in adjacent channel leakage ratio (ACLR) and a 3x improvement in error vector magnitude (EVM) for a 3G mobile handset power amplifier.