{"title":"高效的标准细胞基台检查器","authors":"Juang-Ying Chueh, Chuck Tung","doi":"10.1109/ICECS.2013.6815547","DOIUrl":null,"url":null,"abstract":"An efficient and exhaustive standard-cell abutment verification tool is developed to ensure 100% layout verification coverage of design rule check (DRC) on boundaries created by standard-cell abutment during placement, Vt swap and ECO (engineering change orders). Several case-reduction techniques are presented to remove the redundancy of duplicate abutment. This methodology can achieve one order-of-magnitude reductions in the test area to exercise all boundaries created by all placement permutations in standard cell libraries.","PeriodicalId":117453,"journal":{"name":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Efficient standard cell abutment checker\",\"authors\":\"Juang-Ying Chueh, Chuck Tung\",\"doi\":\"10.1109/ICECS.2013.6815547\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An efficient and exhaustive standard-cell abutment verification tool is developed to ensure 100% layout verification coverage of design rule check (DRC) on boundaries created by standard-cell abutment during placement, Vt swap and ECO (engineering change orders). Several case-reduction techniques are presented to remove the redundancy of duplicate abutment. This methodology can achieve one order-of-magnitude reductions in the test area to exercise all boundaries created by all placement permutations in standard cell libraries.\",\"PeriodicalId\":117453,\"journal\":{\"name\":\"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2013.6815547\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2013.6815547","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An efficient and exhaustive standard-cell abutment verification tool is developed to ensure 100% layout verification coverage of design rule check (DRC) on boundaries created by standard-cell abutment during placement, Vt swap and ECO (engineering change orders). Several case-reduction techniques are presented to remove the redundancy of duplicate abutment. This methodology can achieve one order-of-magnitude reductions in the test area to exercise all boundaries created by all placement permutations in standard cell libraries.