采用运放复位开关技术的低压流水线ADC

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012877

D. Chang, Lei Wu, U. Moon

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引用次数: 9

摘要

提出了一种低压运放复位开关技术(ORST)，该技术可避免时钟升压/自启动、开关运放和阈值电压缩放。将该开关技术应用于一个10位25msps流水线ADC的设计。原型ADC在1.4 V电源下演示了55 dB信噪比、55 dB SFDR和48 dB SNDR。ADC工作在低至1.3 V的电源(|V/sub TH,P/|=0-9 V)下，性能下降5db。最大工作频率为32msps。ORST与未来的低压亚微米CMOS工艺完全兼容。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low-voltage pipelined ADC using opamp-reset switching technique

A low-voltage opamp-reset switching technique (ORST) which avoids clock boosting/bootstrapping, switched-opamp, and threshold voltage scaling is presented. The switching technique is applied to the design of a 10-bit 25 MSPS pipelined ADC. The prototype ADC demonstrates 55 dB SNR, 55 dB SFDR, and 48 dB SNDR at 1.4 V power supply. The ADC operates down to 1.3 V power supply (|V/sub TH,P/|=0-9 V) with 5 dB degradation in performance. Maximum operating frequency is 32 MSPS. The ORST is fully compatible with future low-voltage submicron CMOS processes.

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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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