混合信号设计中模拟电路中衬底噪声影响的评估

2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390) Pub Date : 1900-01-01 DOI:10.1109/SSMSD.2000.836460

Y. Zinzius, E. Lauwers, G. Gielen, Willy Sansen

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引用次数: 14

摘要

本文描述了一种用于模拟体积的方法，这样我们就可以评估衬底噪声对模拟设计的影响。为了减少模拟所需的时间，我们使用了一个简单的模型。在该模型中，我们考虑了焊线和体电阻的影响。将该仿真技术应用于采样保持电路。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Evaluation of the substrate noise effect on analog circuits in mixed-signal designs

This paper describes an approach used to simulate the bulk in such a way that we can evaluate the substrate noise effect on analog designs. For these simulations a simple model is used in order to reduce the time needed for the simulations. In this model we take into account the effect of the bonding wire and the bulk resistance. This simulation technique was applied to a sample and hold circuit.

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2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)

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