完整的Verilog-A栅极无结MOSFET模型

2015 Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2015-11-01 DOI:10.1109/DCIS.2015.7388562

O. Moldovan, F. Lime, B. Iñíguez

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引用次数: 1

摘要

在本文中，我们介绍了在Verilog-A代码中实现完整的直流和交流栅极全方位(GAA)长通道无结MOSFET模型的结果，该模型将进一步用于商业电路模拟器。Verilog-A中的模型集成在SmartSpice电路模拟器中，并在CMOS逆变器中进行测试。验证了p通道和n通道器件模型。同时，将结果与三维数值模拟数据进行了比较，结果表明，在所有晶体管的工作状态下，结果都非常吻合。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A complete Verilog-A Gate-All-Around junctionless MOSFET model

In this paper, we present the results of the implementation of a complete DC and AC Gate-All-Around (GAA) long-channel junctionless MOSFET model in Verilog-A code, which will be further used in commercial circuit simulators. The model in Verilog-A is integrated in the SmartSpice circuit simulator and tested in a CMOS inverter. Both p-channel and n-channel device models are validated. Also, the results are compared with data from 3D numerical simulations, showing a very good agreement in all transistors' operation regimes.

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2015 Conference on Design of Circuits and Integrated Systems (DCIS)

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