一个10位50ms /s 500mw的A/D转换器,采用差分电压变换器

T. Miki, H. Kouno, T. Kumamoto, Y. Kinoshita, T. Igarashi, K. Okada
{"title":"一个10位50ms /s 500mw的A/D转换器,采用差分电压变换器","authors":"T. Miki, H. Kouno, T. Kumamoto, Y. Kinoshita, T. Igarashi, K. Okada","doi":"10.1109/VLSIC.1993.920572","DOIUrl":null,"url":null,"abstract":"This paper describes a low-power BiCMOS A/D converter using a \"differential voltage subconverter\", which directly converts a voltage difference of complementary analog inputs to a digital code. This conversion technique reduces power consumption and signal delay in the A/D converter. Several circuit techniques have also been newly developed to achieve high-accuracy conversion with single 5 V power supply. The 10-bit A/D converter is fabricated in a 0.8 /spl mu/m BiCMOS process and it operates at 50 MS/s with 500 mW.","PeriodicalId":127467,"journal":{"name":"Symposium 1993 on VLSI Circuits","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"31","resultStr":"{\"title\":\"A 10-bit 50 MS/s 500 mW A/D converter using differential-voltage subconverter\",\"authors\":\"T. Miki, H. Kouno, T. Kumamoto, Y. Kinoshita, T. Igarashi, K. Okada\",\"doi\":\"10.1109/VLSIC.1993.920572\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a low-power BiCMOS A/D converter using a \\\"differential voltage subconverter\\\", which directly converts a voltage difference of complementary analog inputs to a digital code. This conversion technique reduces power consumption and signal delay in the A/D converter. Several circuit techniques have also been newly developed to achieve high-accuracy conversion with single 5 V power supply. The 10-bit A/D converter is fabricated in a 0.8 /spl mu/m BiCMOS process and it operates at 50 MS/s with 500 mW.\",\"PeriodicalId\":127467,\"journal\":{\"name\":\"Symposium 1993 on VLSI Circuits\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-05-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"31\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Symposium 1993 on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1993.920572\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1993 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1993.920572","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 31

摘要

本文介绍了一种低功耗BiCMOS a /D转换器,该转换器采用“差分电压子转换器”,将互补模拟输入的电压差直接转换为数字代码。这种转换技术降低了A/D转换器的功耗和信号延迟。一些新的电路技术也被开发出来,以实现单5v电源的高精度转换。该10位A/D转换器采用0.8 /spl mu/m BiCMOS工艺制造,工作速度为50 MS/s,功率为500 mW。
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A 10-bit 50 MS/s 500 mW A/D converter using differential-voltage subconverter
This paper describes a low-power BiCMOS A/D converter using a "differential voltage subconverter", which directly converts a voltage difference of complementary analog inputs to a digital code. This conversion technique reduces power consumption and signal delay in the A/D converter. Several circuit techniques have also been newly developed to achieve high-accuracy conversion with single 5 V power supply. The 10-bit A/D converter is fabricated in a 0.8 /spl mu/m BiCMOS process and it operates at 50 MS/s with 500 mW.
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