用于60 GHz应用的40纳米CMOS的48 GHz 6位lo路径移相器

Chuang Lu, M. Matters-Kammerer, R. Mahmoudi, P. Baltus, E. Habekotté, K. V. Hartingsveldt, F. V. D. Wilt
{"title":"用于60 GHz应用的40纳米CMOS的48 GHz 6位lo路径移相器","authors":"Chuang Lu, M. Matters-Kammerer, R. Mahmoudi, P. Baltus, E. Habekotté, K. V. Hartingsveldt, F. V. D. Wilt","doi":"10.1109/ESSCIRC.2013.6649075","DOIUrl":null,"url":null,"abstract":"This paper presents a 48 GHz high resolution LO-path phase shifter implemented in 40-nm low-power CMOS technology. The full 360° phase shift tuning is implemented by a switched capacitor loaded tunable transmission line for fine tuning, in combination with a selection of one out of the N×45° phase steps available from the frequency divider-by-4 for coarse tuning. The measured phase shift resolution is 5.4° between 44 GHz and 54 GHz, which offers about 6-bit resolution. The chip area of the core circuitry is 550μm×260μm, and the total current consumption is 14.1 mA from a 1.2 V supply voltage.","PeriodicalId":183620,"journal":{"name":"2013 Proceedings of the ESSCIRC (ESSCIRC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A 48 GHz 6-bit LO-path phase shifter in 40-nm CMOS for 60 GHz applications\",\"authors\":\"Chuang Lu, M. Matters-Kammerer, R. Mahmoudi, P. Baltus, E. Habekotté, K. V. Hartingsveldt, F. V. D. Wilt\",\"doi\":\"10.1109/ESSCIRC.2013.6649075\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 48 GHz high resolution LO-path phase shifter implemented in 40-nm low-power CMOS technology. The full 360° phase shift tuning is implemented by a switched capacitor loaded tunable transmission line for fine tuning, in combination with a selection of one out of the N×45° phase steps available from the frequency divider-by-4 for coarse tuning. The measured phase shift resolution is 5.4° between 44 GHz and 54 GHz, which offers about 6-bit resolution. The chip area of the core circuitry is 550μm×260μm, and the total current consumption is 14.1 mA from a 1.2 V supply voltage.\",\"PeriodicalId\":183620,\"journal\":{\"name\":\"2013 Proceedings of the ESSCIRC (ESSCIRC)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Proceedings of the ESSCIRC (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2013.6649075\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2013.6649075","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12

摘要

提出了一种采用40纳米低功耗CMOS技术实现的48 GHz高分辨率lo路移相器。完整的360°相移调谐是通过一个开关电容负载的可调谐传输线实现的,用于微调,结合从4分频器中可选择的N×45°相位步骤之一进行粗调谐。测量的相移分辨率在44 GHz和54 GHz之间为5.4°,提供约6位分辨率。核心电路的芯片面积为550μm×260μm,在1.2 V电源电压下,总电流消耗为14.1 mA。
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A 48 GHz 6-bit LO-path phase shifter in 40-nm CMOS for 60 GHz applications
This paper presents a 48 GHz high resolution LO-path phase shifter implemented in 40-nm low-power CMOS technology. The full 360° phase shift tuning is implemented by a switched capacitor loaded tunable transmission line for fine tuning, in combination with a selection of one out of the N×45° phase steps available from the frequency divider-by-4 for coarse tuning. The measured phase shift resolution is 5.4° between 44 GHz and 54 GHz, which offers about 6-bit resolution. The chip area of the core circuitry is 550μm×260μm, and the total current consumption is 14.1 mA from a 1.2 V supply voltage.
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