定制模拟低功耗设计:低电压和失配问题

M. Steyaert, V. Peluso, J. Bastos, P. Kinget, W. Sansen
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引用次数: 69

摘要

技术趋向于更小的晶体管尺寸的永无止境的故事已经导致了深亚微米晶体管的出现。其结果是电源电压的缩小,到目前为止甚至低于2 V,几乎相同的CMOS晶体管的阈值电压。这些低电压意味着一些广泛使用的技术,如开关电容器,不能再实施了。另一方面,定制集成电路需要更高的速度,更高的精度和更少的功耗。在第一部分中,讨论了模拟电路中失配或精度的影响以及对功率损耗的影响。其次,第二部分分析了模拟集成电路设计在速度、精度和功耗之间权衡的一些基本限制。第三部分研究了开关电容电路中极低压信号的处理问题。提出了一些解决方案,如开关运放技术,并通过设计一个极低功耗、低电压的σ δ调制器来证明该技术。最后讨论了在标准CMOS技术下,工作在1.5 V电源电压下,功耗小于100 /spl mu/W的12位σ δ模数转换器的设计和测量。
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Custom analog low power design: the problem of low voltage and mismatch
The never ending story of technology trends towards smaller transistor dimensions have resulted to date in deep submicron transistors. The consequence is the down scaling of the power supply voltages, to date even lower than 2 V, with almost the same threshold voltages of the CMOS transistors. Those low voltages mean that some widespread techniques such as switched-capacitors cannot be implemented anymore. On the other hand custom integrated circuits require continually higher speeds, more accuracy and less power drain. In the first section, the impact of mismatch or accuracy in analog circuits and the impact on power drain is discussed. Secondly, in section two some fundamental limitations of analog integrated circuit design in the trade-off between speed, accuracy and power drain are analysed. In the third section the problem of very low voltage signal processing in switched-capacitor circuits is studied. Some solutions, such as the switched-opamp technique are presented, and the technique is demonstrated by the design of a very low power, low voltage sigma delta modulator. The design and the measurements of 12 bit sigma delta AD converters running at 1.5 V power supply voltage and consuming less than 100 /spl mu/W in standard CMOS technology are finally discussed.
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